arm_gic: Introduce define for GIC_NR_SGIS
Instead of hardcoding 16 various places in the code, use a define to make it more clear what is going on. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -380,8 +380,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
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irq = (offset - 0x100) * 8 + GIC_BASE_IRQ;
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if (irq >= s->num_irq)
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goto bad_reg;
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if (irq < 16)
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if (irq < GIC_NR_SGIS) {
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value = 0xff;
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}
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for (i = 0; i < 8; i++) {
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if (value & (1 << i)) {
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int mask =
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@ -406,8 +408,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
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irq = (offset - 0x180) * 8 + GIC_BASE_IRQ;
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if (irq >= s->num_irq)
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goto bad_reg;
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if (irq < 16)
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if (irq < GIC_NR_SGIS) {
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value = 0;
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}
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for (i = 0; i < 8; i++) {
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if (value & (1 << i)) {
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int cm = (irq < GIC_INTERNAL) ? (1 << cpu) : ALL_CPU_MASK;
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@ -423,8 +427,9 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
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irq = (offset - 0x200) * 8 + GIC_BASE_IRQ;
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if (irq >= s->num_irq)
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goto bad_reg;
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if (irq < 16)
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if (irq < GIC_NR_SGIS) {
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irq = 0;
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}
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for (i = 0; i < 8; i++) {
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if (value & (1 << i)) {
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@ -27,6 +27,7 @@
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#define GIC_MAXIRQ 1020
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/* First 32 are private to each CPU (SGIs and PPIs). */
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#define GIC_INTERNAL 32
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#define GIC_NR_SGIS 16
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/* Maximum number of possible CPU interfaces, determined by GIC architecture */
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#define GIC_NCPU 8
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