From b3175081a1215339b741ee92a00d5678a3094249 Mon Sep 17 00:00:00 2001 From: Jianlin Li Date: Fri, 22 Sep 2023 15:38:35 +0800 Subject: [PATCH 01/12] Update AMD memory encryption document links. The previous links for the white paper and programmer's manual are no longer available. Replace them with the new ones. Signed-off-by: Jianlin Li Reviewed-by: Michael Tokarev Signed-off-by: Michael Tokarev --- docs/system/i386/amd-memory-encryption.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/system/i386/amd-memory-encryption.rst b/docs/system/i386/amd-memory-encryption.rst index dcf4add0e7..e9bc142bc1 100644 --- a/docs/system/i386/amd-memory-encryption.rst +++ b/docs/system/i386/amd-memory-encryption.rst @@ -183,13 +183,13 @@ References ---------- `AMD Memory Encryption whitepaper -`_ +`_ .. [SEVAPI] `Secure Encrypted Virtualization API `_ .. [APMVOL2] `AMD64 Architecture Programmer's Manual Volume 2: System Programming - `_ + `_ KVM Forum slides: @@ -199,7 +199,7 @@ KVM Forum slides: `_ `AMD64 Architecture Programmer's Manual: -`_ +`_ * SME is section 7.10 * SEV is section 15.34 From bb30277273fdacff4635a59d5181f7a093cab6a8 Mon Sep 17 00:00:00 2001 From: Pierre Labatut Date: Thu, 28 Sep 2023 12:56:59 +0000 Subject: [PATCH 02/12] Fix compilation when UFFDIO_REGISTER is not set. Signed-off-by: Pierre Labatut Signed-off-by: Michael Tokarev --- subprojects/libvhost-user/libvhost-user.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subprojects/libvhost-user/libvhost-user.c b/subprojects/libvhost-user/libvhost-user.c index 051a611da3..ac6d5d01d3 100644 --- a/subprojects/libvhost-user/libvhost-user.c +++ b/subprojects/libvhost-user/libvhost-user.c @@ -631,9 +631,9 @@ static bool generate_faults(VuDev *dev) { unsigned int i; for (i = 0; i < dev->nregions; i++) { +#ifdef UFFDIO_REGISTER VuDevRegion *dev_region = &dev->regions[i]; int ret; -#ifdef UFFDIO_REGISTER struct uffdio_register reg_struct; /* From 740ee84db8732c11e2db8bba6630046634f3c5e9 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 29 Sep 2023 16:09:35 +0200 Subject: [PATCH 03/12] MAINTAINERS: Add g364fb and ds1225y to the Jazz section MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These devices are only used by the Jazz machine, so they should be listed in the corresponding section in MAINTAINERS. Signed-off-by: Thomas Huth Acked-by: Philippe Mathieu-Daudé Signed-off-by: Michael Tokarev --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9e7dec4a58..93756ec21a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1286,8 +1286,10 @@ M: Hervé Poussineau R: Aleksandar Rikalo S: Maintained F: hw/mips/jazz.c +F: hw/display/g364fb.c F: hw/display/jazz_led.c F: hw/dma/rc4030.c +F: hw/nvram/ds1225y.c Malta M: Philippe Mathieu-Daudé From 5d0ce90dd6881b044bf1a28dc966eee44bcc1dde Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 29 Sep 2023 14:37:27 +0200 Subject: [PATCH 04/12] MAINTAINERS: Add unowned RISC-V related files to the right sections MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are a bunch of RISC-V files that are currently not covered by the "get_maintainers.pl" script. Add them to the right sections in MAINTAINERS to fix this problem. Signed-off-by: Thomas Huth Acked-by: Christoph Müllner Reviewed-by: Daniel Henrique Barboza Reviewed-by: Philipp Tomsich Reviewed-by: LIU Zhiwei Signed-off-by: Michael Tokarev --- MAINTAINERS | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 93756ec21a..e80fca855a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -318,8 +318,11 @@ R: Daniel Henrique Barboza R: Liu Zhiwei L: qemu-riscv@nongnu.org S: Supported +F: configs/targets/riscv* +F: docs/system/target-riscv.rst F: target/riscv/ F: hw/riscv/ +F: hw/intc/riscv* F: include/hw/riscv/ F: linux-user/host/riscv32/ F: linux-user/host/riscv64/ @@ -331,6 +334,7 @@ L: qemu-riscv@nongnu.org S: Supported F: target/riscv/insn_trans/trans_xthead.c.inc F: target/riscv/xthead*.decode +F: disas/riscv-xthead* RISC-V XVentanaCondOps extension M: Philipp Tomsich @@ -338,6 +342,7 @@ L: qemu-riscv@nongnu.org S: Maintained F: target/riscv/XVentanaCondOps.decode F: target/riscv/insn_trans/trans_xventanacondops.c.inc +F: disas/riscv-xventana* RENESAS RX CPUs R: Yoshinori Sato @@ -1527,6 +1532,7 @@ Microchip PolarFire SoC Icicle Kit M: Bin Meng L: qemu-riscv@nongnu.org S: Supported +F: docs/system/riscv/microchip-icicle-kit.rst F: hw/riscv/microchip_pfsoc.c F: hw/char/mchp_pfsoc_mmuart.c F: hw/misc/mchp_pfsoc_dmc.c @@ -1542,6 +1548,7 @@ Shakti C class SoC M: Vijai Kumar K L: qemu-riscv@nongnu.org S: Supported +F: docs/system/riscv/shakti-c.rst F: hw/riscv/shakti_c.c F: hw/char/shakti_uart.c F: include/hw/riscv/shakti_c.h @@ -1553,6 +1560,7 @@ M: Bin Meng M: Palmer Dabbelt L: qemu-riscv@nongnu.org S: Supported +F: docs/system/riscv/sifive_u.rst F: hw/*/*sifive*.c F: include/hw/*/*sifive*.h @@ -3573,7 +3581,7 @@ M: Alistair Francis L: qemu-riscv@nongnu.org S: Maintained F: tcg/riscv/ -F: disas/riscv.c +F: disas/riscv.[ch] S390 TCG target M: Richard Henderson From 63fc07233e7939d595ee4e8e24710c637b9785c0 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 29 Sep 2023 14:44:39 +0200 Subject: [PATCH 05/12] MAINTAINERS: Add include folder to the hw/char/ section MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The "Character devices" section only covers hw/char/ but misses the corresponding include/hw/char/ folder. Add it now. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Michael Tokarev --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index e80fca855a..0f9c4b263e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1988,6 +1988,7 @@ M: Marc-André Lureau R: Paolo Bonzini S: Odd Fixes F: hw/char/ +F: include/hw/char/ Network devices M: Jason Wang From 145af2779c30d5a74c252b6146fa83e8d8120786 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 29 Sep 2023 15:16:36 +0200 Subject: [PATCH 06/12] MAINTAINERS: Add the CI-related doc files to the CI section MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The docs/devel/ci* were not covered yet, add them to MAINTAINERS so that the right people are put on CC: for related patches. Signed-off-by: Thomas Huth Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Michael Tokarev --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 0f9c4b263e..de2ef5add3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3918,6 +3918,7 @@ F: .github/workflows/lockdown.yml F: .gitlab-ci.yml F: .gitlab-ci.d/ F: .travis.yml +F: docs/devel/ci* F: scripts/ci/ F: tests/docker/ F: tests/vm/ From e05ea75f75c023c0520cd9ea2f6e93b008822347 Mon Sep 17 00:00:00 2001 From: Cornelia Huck Date: Fri, 29 Sep 2023 16:30:12 +0200 Subject: [PATCH 07/12] MAINTAINERS: add standard-headers to Hosts/LINUX MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The files in there are updated via update-linux-headers.sh. Signed-off-by: Cornelia Huck Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Michael Tokarev --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index de2ef5add3..6f947ffccb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -562,6 +562,7 @@ M: Cornelia Huck M: Paolo Bonzini S: Maintained F: linux-headers/ +F: include/standard-headers/ F: scripts/update-linux-headers.sh POSIX From 39131a4e530afb6d926cab871d8bcc99a2df1288 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 20 Feb 2023 12:02:35 +0100 Subject: [PATCH 08/12] MAINTAINERS: Add section for overall sensors MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sensor devices depend on some bus, not a particular board. While merged for a particular board, sensor devices don't depend on it. They depend on a bus technology, and can be used by any board exposing such bus. In order to help merging sensor patches, when they fall out of a particular board tree, add a section covering overall sensors, to help out with patch review and merge queue handling. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Signed-off-by: Michael Tokarev --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6f947ffccb..b217080fee 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3418,6 +3418,12 @@ M: Viktor Prutyanov S: Maintained F: contrib/elf2dmp/ +Overall sensors +M: Philippe Mathieu-Daudé +S: Odd Fixes +F: hw/sensor +F: include/hw/sensor + I2C and SMBus M: Corey Minyard S: Maintained From d02ce621ea98517a40510f1540813b5dedbe3a79 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 29 Sep 2023 16:19:18 +0200 Subject: [PATCH 09/12] MAINTAINERS: Add some unowned files to the SBSA-REF section These files belong to the sbsa-ref machine and thus should be listed here. Signed-off-by: Thomas Huth Reviewed-by: Leif Lindholm Signed-off-by: Michael Tokarev --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b217080fee..0bab360c12 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -945,6 +945,9 @@ R: Marcin Juszkiewicz L: qemu-arm@nongnu.org S: Maintained F: hw/arm/sbsa-ref.c +F: hw/misc/sbsa_ec.c +F: hw/watchdog/sbsa_gwdt.c +F: include/hw/watchdog/sbsa_gwdt.h F: docs/system/arm/sbsa.rst F: tests/avocado/machine_aarch64_sbsaref.py From 17b8d8ac3309e2cfed0d8cb3861afdcc23f66ce0 Mon Sep 17 00:00:00 2001 From: Olaf Hering Date: Mon, 2 Oct 2023 12:18:44 +0200 Subject: [PATCH 10/12] roms: use PYTHON to invoke python python3 may not be the expected python version. Use PYTHON to invoke python. Fixes: 22e11539e1 ("edk2: replace build scripts") Signed-off-by: Olaf Hering Signed-off-by: Michael Tokarev --- roms/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/roms/Makefile b/roms/Makefile index 6859685290..67f709ba2d 100644 --- a/roms/Makefile +++ b/roms/Makefile @@ -147,7 +147,7 @@ skiboot: cp skiboot/skiboot.lid ../pc-bios/skiboot.lid efi: - python3 edk2-build.py --config edk2-build.config \ + $(PYTHON) edk2-build.py --config edk2-build.config \ --version-override "edk2-stable202302-for-qemu" \ --release-date "03/01/2023" rm -f ../pc-bios/edk2-*.fd.bz2 From 0848ca87b76b21639f314bd348ae8470db5b22e2 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 6 Oct 2023 06:52:56 +0200 Subject: [PATCH 11/12] scripts/xml-preprocess: Make sure this script is invoked via the right Python MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If a script is executable and has a shebang line, Meson treats it as a normal executable, so that this script here is run via the "python3" binary in the $PATH. However, "python3" might not be in the $PATH at all, or it might be a wrong version, so we should make sure to run this script via the Python version that has been chosen for the QEMU build process. The best way to do this is to remove the executable bit from the access mode bits. (See also commit 4b424c757188f7a4) Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1918 Signed-off-by: Thomas Huth Reviewed-by: Marc-André Lureau Signed-off-by: Michael Tokarev --- scripts/xml-preprocess.py | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 scripts/xml-preprocess.py diff --git a/scripts/xml-preprocess.py b/scripts/xml-preprocess.py old mode 100755 new mode 100644 From b216b5daa57ce068183ce865c163f4df01b74614 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 9 Oct 2023 11:09:52 +0200 Subject: [PATCH 12/12] cpus: Remove unused smp_cores/smp_threads declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit a5e0b33119 ("vl.c: Replace smp global variables with smp machine properties") removed the last uses of the smp_cores / smp_threads variables but forgot to remove their declarations. Do it now. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Michael Tokarev --- include/sysemu/cpus.h | 7 ------- 1 file changed, 7 deletions(-) diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h index 0535a4c68a..b4a566cfe7 100644 --- a/include/sysemu/cpus.h +++ b/include/sysemu/cpus.h @@ -50,11 +50,4 @@ void cpu_synchronize_all_post_reset(void); void cpu_synchronize_all_post_init(void); void cpu_synchronize_all_pre_loadvm(void); -#ifndef CONFIG_USER_ONLY -/* vl.c */ -/* *-user doesn't have configurable SMP topology */ -extern int smp_cores; -extern int smp_threads; -#endif - #endif