target-i386: exception handling for other helper functions
This patch fixes exception handling for other helper functions. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
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100ec09919
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@ -378,7 +378,7 @@ void helper_sti_vm(CPUX86State *env)
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{
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{
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env->eflags |= VIF_MASK;
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env->eflags |= VIF_MASK;
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if (env->eflags & VIP_MASK) {
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if (env->eflags & VIP_MASK) {
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raise_exception(env, EXCP0D_GPF);
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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}
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}
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}
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#endif
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#endif
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@ -220,7 +220,7 @@ void helper_rdtsc(CPUX86State *env)
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uint64_t val;
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uint64_t val;
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if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
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if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
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raise_exception(env, EXCP0D_GPF);
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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}
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cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0);
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cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0);
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@ -238,7 +238,7 @@ void helper_rdtscp(CPUX86State *env)
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void helper_rdpmc(CPUX86State *env)
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void helper_rdpmc(CPUX86State *env)
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{
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{
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if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
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if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
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raise_exception(env, EXCP0D_GPF);
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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}
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cpu_svm_check_intercept_param(env, SVM_EXIT_RDPMC, 0);
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cpu_svm_check_intercept_param(env, SVM_EXIT_RDPMC, 0);
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@ -589,7 +589,7 @@ void helper_hlt(CPUX86State *env, int next_eip_addend)
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void helper_monitor(CPUX86State *env, target_ulong ptr)
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void helper_monitor(CPUX86State *env, target_ulong ptr)
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{
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{
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if ((uint32_t)env->regs[R_ECX] != 0) {
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if ((uint32_t)env->regs[R_ECX] != 0) {
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raise_exception(env, EXCP0D_GPF);
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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}
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/* XXX: store address? */
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/* XXX: store address? */
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cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0);
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cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0);
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@ -601,7 +601,7 @@ void helper_mwait(CPUX86State *env, int next_eip_addend)
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X86CPU *cpu;
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X86CPU *cpu;
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if ((uint32_t)env->regs[R_ECX] != 0) {
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if ((uint32_t)env->regs[R_ECX] != 0) {
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raise_exception(env, EXCP0D_GPF);
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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}
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cpu_svm_check_intercept_param(env, SVM_EXIT_MWAIT, 0);
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cpu_svm_check_intercept_param(env, SVM_EXIT_MWAIT, 0);
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env->eip += next_eip_addend;
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env->eip += next_eip_addend;
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@ -483,7 +483,7 @@ void glue(helper_maskmov, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
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for (i = 0; i < (8 << SHIFT); i++) {
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for (i = 0; i < (8 << SHIFT); i++) {
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if (s->B(i) & 0x80) {
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if (s->B(i) & 0x80) {
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cpu_stb_data(env, a0 + i, d->B(i));
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cpu_stb_data_ra(env, a0 + i, d->B(i), GETPC());
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}
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}
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}
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}
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}
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}
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