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hw/gpio/aspeed: Support different memory region ops

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It set "aspeed_gpio_ops" struct which containing read and write callbacks
to be used when I/O is performed on the GPIO region.

Besides, in the previous design of ASPEED SOCs, one register is used for
setting one function for 32 GPIO pins.
ex: GPIO000 is used for setting data value for GPIO A, B, C and D in AST2600.
ex: GPIO004 is used for setting direction for GPIO A, B, C and D in AST2600.

However, the register set have a significant change in AST2700.
Each GPIO pin has their own control register. In other words, users are able to
set one GPIO pin’s direction, interrupt enable, input mask and so on
in one register. The aspeed_gpio_read/aspeed_gpio_write callback functions
are not compatible AST2700.

Introduce a new "const MemoryRegionOps *" attribute in AspeedGPIOClass and
use it in aspeed_gpio_realize function.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin 2024-10-01 10:43:29 +08:00 committed by Cédric Le Goater
parent 9422dbd10b
commit 404e75343c
2 changed files with 7 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
hw/gpio/aspeed_gpio.c
View File

@ -1046,7 +1046,7 @@ static void aspeed_gpio_realize(DeviceState *dev, Error **errp)
}
}
memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_gpio_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), agc->reg_ops, s,
TYPE_ASPEED_GPIO, agc->mem_size);
sysbus_init_mmio(sbd, &s->iomem);
@ -1131,6 +1131,7 @@ static void aspeed_gpio_ast2400_class_init(ObjectClass *klass, void *data)
agc->reg_table = aspeed_3_3v_gpios;
agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
agc->mem_size = 0x1000;
agc->reg_ops = &aspeed_gpio_ops;
}
static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data)
@ -1143,6 +1144,7 @@ static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data)
agc->reg_table = aspeed_3_3v_gpios;
agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
agc->mem_size = 0x1000;
agc->reg_ops = &aspeed_gpio_ops;
}
static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data)
@ -1155,6 +1157,7 @@ static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data)
agc->reg_table = aspeed_3_3v_gpios;
agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
agc->mem_size = 0x800;
agc->reg_ops = &aspeed_gpio_ops;
}
static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data)
@ -1167,6 +1170,7 @@ static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data)
agc->reg_table = aspeed_1_8v_gpios;
agc->reg_table_count = GPIO_1_8V_REG_ARRAY_SIZE;
agc->mem_size = 0x800;
agc->reg_ops = &aspeed_gpio_ops;
}
static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data)
@ -1179,6 +1183,7 @@ static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data)
agc->reg_table = aspeed_3_3v_gpios;
agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
agc->mem_size = 0x1000;
agc->reg_ops = &aspeed_gpio_ops;
}
static const TypeInfo aspeed_gpio_info = {

1
include/hw/gpio/aspeed_gpio.h
View File

@ -77,6 +77,7 @@ struct AspeedGPIOClass {
const AspeedGPIOReg *reg_table;
unsigned reg_table_count;
uint64_t mem_size;
const MemoryRegionOps *reg_ops;
};
struct AspeedGPIOState {