mcf5206: Pass M68kCPU to mcf5206_init()
Store it in m5206_mbar_state. Prepares for passing M68kCPU to m68k_set_irq_level(). Signed-off-by: Andreas Färber <afaerber@suse.de>
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parent
c7937d9f9a
commit
4025cfd5d7
11
hw/an5206.c
11
hw/an5206.c
@ -24,6 +24,7 @@ static void an5206_init(QEMUMachineInitArgs *args)
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ram_addr_t ram_size = args->ram_size;
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const char *cpu_model = args->cpu_model;
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const char *kernel_filename = args->kernel_filename;
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M68kCPU *cpu;
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CPUM68KState *env;
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int kernel_size;
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uint64_t elf_entry;
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@ -32,12 +33,14 @@ static void an5206_init(QEMUMachineInitArgs *args)
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *sram = g_new(MemoryRegion, 1);
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if (!cpu_model)
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if (!cpu_model) {
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cpu_model = "m5206";
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env = cpu_init(cpu_model);
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if (!env) {
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}
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cpu = cpu_m68k_init(cpu_model);
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if (!cpu) {
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hw_error("Unable to find m68k CPU definition\n");
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}
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env = &cpu->env;
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/* Initialize CPU registers. */
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env->vbr = 0;
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@ -55,7 +58,7 @@ static void an5206_init(QEMUMachineInitArgs *args)
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vmstate_register_ram_global(sram);
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memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);
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mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env);
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mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, cpu);
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/* Load kernel. */
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if (!kernel_filename) {
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2
hw/mcf.h
2
hw/mcf.h
@ -25,6 +25,6 @@ void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd,
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/* mcf5206.c */
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qemu_irq *mcf5206_init(struct MemoryRegion *sysmem,
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uint32_t base, CPUM68KState *env);
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uint32_t base, M68kCPU *cpu);
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#endif
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@ -145,7 +145,7 @@ static m5206_timer_state *m5206_timer_init(qemu_irq irq)
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/* System Integration Module. */
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typedef struct {
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CPUM68KState *env;
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M68kCPU *cpu;
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MemoryRegion iomem;
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m5206_timer_state *timer[2];
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void *uart[2];
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@ -226,7 +226,7 @@ static void m5206_mbar_update(m5206_mbar_state *s)
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level = 0;
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vector = 0;
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}
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m68k_set_irq_level(s->env, level, vector);
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m68k_set_irq_level(&s->cpu->env, level, vector);
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}
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static void m5206_mbar_set_irq(void *opaque, int irq, int level)
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@ -525,7 +525,7 @@ static const MemoryRegionOps m5206_mbar_ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env)
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qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, M68kCPU *cpu)
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{
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m5206_mbar_state *s;
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qemu_irq *pic;
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@ -541,7 +541,7 @@ qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env)
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s->timer[1] = m5206_timer_init(pic[10]);
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s->uart[0] = mcf_uart_init(pic[12], serial_hds[0]);
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s->uart[1] = mcf_uart_init(pic[13], serial_hds[1]);
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s->env = env;
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s->cpu = cpu;
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m5206_mbar_reset(s);
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return pic;
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