mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Hexagon (target/hexagon) Remove PC from the runtime state

Browse Source 
Add pc field to Packet structure
For helpers that need PC, pass an extra argument
Remove slot arg from conditional jump helpers
On a trap0, copy pkt->pc into hex_gpr[HEX_REG_PC]

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221108162906.3166-6-tsimpson@quicinc.com>
This commit is contained in:
Taylor Simpson 2022-11-08 08:29:00 -08:00
parent fb67c2bf24
commit 40085901db
8 changed files with 25 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/hexagon/gen_helper_funcs.py
View File

@ -241,6 +241,10 @@ def gen_helper_function(f, tag, tagregs, tagimms):
if (hex_common.need_pkt_has_multi_cof(tag)):
f.write(", uint32_t pkt_has_multi_cof")
if hex_common.need_PC(tag):
if i > 0: f.write(", ")
f.write("target_ulong PC")
i += 1
if hex_common.need_slot(tag):
if i > 0: f.write(", ")
f.write("uint32_t slot")

3
target/hexagon/gen_helper_protos.py
View File

@ -85,6 +85,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1
if hex_common.need_part1(tag): def_helper_size += 1
if hex_common.need_slot(tag): def_helper_size += 1
if hex_common.need_PC(tag): def_helper_size += 1
f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
## The return type is void
f.write(', void' )
@ -93,6 +94,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1
if hex_common.need_part1(tag): def_helper_size += 1
if hex_common.need_slot(tag): def_helper_size += 1
if hex_common.need_PC(tag): def_helper_size += 1
f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
## Generate the qemu DEF_HELPER type for each result
@ -131,6 +133,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
## Add the arguments for the instruction pkt_has_multi_cof, slot and
## part1 (if needed)
if hex_common.need_pkt_has_multi_cof(tag): f.write(', i32')
if hex_common.need_PC(tag): f.write(', i32')
if hex_common.need_slot(tag): f.write(', i32' )
if hex_common.need_part1(tag): f.write(' , i32' )
f.write(')\n')

7
target/hexagon/gen_tcg.h
View File

@ -750,4 +750,11 @@
RsV = RsV; \
} while (0)
#define fGEN_TCG_J2_trap0(SHORTCODE) \
do { \
uiV = uiV; \
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->pkt->pc); \
TCGv excp = tcg_constant_tl(HEX_EXCP_TRAP0); \
gen_helper_raise_exception(cpu_env, excp); \
} while (0)
#endif

3
target/hexagon/gen_tcg_funcs.py
View File

@ -629,6 +629,8 @@ def gen_tcg_func(f, tag, regs, imms):
f.write(" TCGv part1 = tcg_constant_tl(insn->part1);\n")
if hex_common.need_slot(tag):
f.write(" TCGv slot = tcg_constant_tl(insn->slot);\n")
if hex_common.need_PC(tag):
f.write(" TCGv PC = tcg_constant_tl(ctx->pkt->pc);\n")
f.write(" gen_helper_%s(" % (tag))
i=0
## If there is a scalar result, it is the return type
@ -659,6 +661,7 @@ def gen_tcg_func(f, tag, regs, imms):
if hex_common.need_pkt_has_multi_cof(tag):
f.write(", pkt_has_multi_cof")
if hex_common.need_PC(tag): f.write(", PC")
if hex_common.need_slot(tag): f.write(", slot")
if hex_common.need_part1(tag): f.write(", part1" )
f.write(");\n")

6
target/hexagon/hex_common.py
View File

@ -194,7 +194,8 @@ def is_new_val(regtype, regid, tag):
return regtype+regid+'N' in semdict[tag]
def need_slot(tag):
if ('A_CONDEXEC' in attribdict[tag] or
if (('A_CONDEXEC' in attribdict[tag] and
'A_JUMP' not in attribdict[tag]) or
'A_STORE' in attribdict[tag] or
'A_LOAD' in attribdict[tag]):
return 1
@ -207,6 +208,9 @@ def need_part1(tag):
def need_ea(tag):
return re.compile(r"\bEA\b").search(semdict[tag])
def need_PC(tag):
return 'A_IMPLICIT_READS_PC' in attribdict[tag]
def need_pkt_has_multi_cof(tag):
return 'A_COF' in attribdict[tag]

1
target/hexagon/insn.h
View File

@ -54,6 +54,7 @@ typedef struct Instruction Insn;
struct Packet {
uint16_t num_insns;
uint16_t encod_pkt_size_in_bytes;
uint32_t pc;
/* Pre-decodes about COF */
bool pkt_has_cof; /* Has any change-of-flow */

2
target/hexagon/macros.h
View File

@ -398,7 +398,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
#else
#define fREAD_GP() READ_REG(HEX_REG_GP)
#endif
#define fREAD_PC() (READ_REG(HEX_REG_PC))
#define fREAD_PC() (PC)
#define fREAD_NPC() (env->next_PC & (0xfffffffe))

9
target/hexagon/translate.c
View File

@ -194,11 +194,6 @@ static bool check_for_attrib(Packet *pkt, int attrib)
return false;
}
static bool need_pc(Packet *pkt)
{
return check_for_attrib(pkt, A_IMPLICIT_READS_PC);
}
static bool need_slot_cancelled(Packet *pkt)
{
return check_for_attrib(pkt, A_CONDEXEC);
@ -241,9 +236,6 @@ static void gen_start_packet(DisasContext *ctx)
}
/* Initialize the runtime state for packet semantics */
if (need_pc(pkt)) {
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->base.pc_next);
}
if (need_slot_cancelled(pkt)) {
tcg_gen_movi_tl(hex_slot_cancelled, 0);
}
@ -772,6 +764,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx)
}
if (decode_packet(nwords, words, &pkt, false) > 0) {
pkt.pc = ctx->base.pc_next;
HEX_DEBUG_PRINT_PKT(&pkt);
ctx->pkt = &pkt;
gen_start_packet(ctx);