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target/arm: Convert get_phys_addr_pmsav8() to not return FSC values 

Make get_phys_addr_pmsav8() return a fault type in the ARMMMUFaultInfo
structure, which we convert to the FSC at the callsite.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Stefano Stabellini <sstabellini@kernel.org>
Message-id: 1512503192-2239-9-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2017-12-13 17:59:25 +00:00
parent 9375ad1533
commit 3f551b5b73
1 changed files with 18 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
target/arm/helper.c
View File

@ -9364,7 +9364,7 @@ static void v8m_security_lookup(CPUARMState *env, uint32_t address,
static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx, MMUAccessType access_type, ARMMMUIdx mmu_idx,
hwaddr *phys_ptr, MemTxAttrs *txattrs, hwaddr *phys_ptr, MemTxAttrs *txattrs,
int *prot, uint32_t *fsr, uint32_t *mregion) int *prot, ARMMMUFaultInfo *fi, uint32_t *mregion)
{ {
/* Perform a PMSAv8 MPU lookup (without also doing the SAU check /* Perform a PMSAv8 MPU lookup (without also doing the SAU check
* that a full phys-to-virt translation does). * that a full phys-to-virt translation does).
@ -9420,7 +9420,8 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
/* Multiple regions match -- always a failure (unlike /* Multiple regions match -- always a failure (unlike
* PMSAv7 where highest-numbered-region wins) * PMSAv7 where highest-numbered-region wins)
*/ */
*fsr = 0x00d; /* permission fault */ fi->type = ARMFault_Permission;
fi->level = 1;
return true; return true;
} }
@ -9448,7 +9449,7 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
if (!hit) { if (!hit) {
/* background fault */ /* background fault */
*fsr = 0; fi->type = ARMFault_Background;
return true; return true;
} }
@ -9476,7 +9477,8 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
} }
} }
*fsr = 0x00d; /* Permission fault */ fi->type = ARMFault_Permission;
fi->level = 1;
return !(*prot & (1 << access_type)); return !(*prot & (1 << access_type));
} }
@ -9484,7 +9486,7 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx, MMUAccessType access_type, ARMMMUIdx mmu_idx,
hwaddr *phys_ptr, MemTxAttrs *txattrs, hwaddr *phys_ptr, MemTxAttrs *txattrs,
int *prot, uint32_t *fsr) int *prot, ARMMMUFaultInfo *fi)
{ {
uint32_t secure = regime_is_secure(env, mmu_idx); uint32_t secure = regime_is_secure(env, mmu_idx);
V8M_SAttributes sattrs = {}; V8M_SAttributes sattrs = {};
@ -9510,7 +9512,11 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
* (including possibly emulating an SG instruction). * (including possibly emulating an SG instruction).
*/ */
if (sattrs.ns != !secure) { if (sattrs.ns != !secure) {
*fsr = sattrs.nsc ? M_FAKE_FSR_NSC_EXEC : M_FAKE_FSR_SFAULT; if (sattrs.nsc) {
fi->type = ARMFault_QEMU_NSCExec;
} else {
fi->type = ARMFault_QEMU_SFault;
}
*phys_ptr = address; *phys_ptr = address;
*prot = 0; *prot = 0;
return true; return true;
@ -9532,7 +9538,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
* If we added it we would need to do so as a special case * If we added it we would need to do so as a special case
* for M_FAKE_FSR_SFAULT in arm_v7m_cpu_do_interrupt(). * for M_FAKE_FSR_SFAULT in arm_v7m_cpu_do_interrupt().
*/ */
*fsr = M_FAKE_FSR_SFAULT; fi->type = ARMFault_QEMU_SFault;
*phys_ptr = address; *phys_ptr = address;
*prot = 0; *prot = 0;
return true; return true;
@ -9541,7 +9547,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
} }
return pmsav8_mpu_lookup(env, address, access_type, mmu_idx, phys_ptr, return pmsav8_mpu_lookup(env, address, access_type, mmu_idx, phys_ptr,
txattrs, prot, fsr, NULL); txattrs, prot, fi, NULL);
} }
static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,
@ -9819,7 +9825,8 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
if (arm_feature(env, ARM_FEATURE_V8)) { if (arm_feature(env, ARM_FEATURE_V8)) {
/* PMSAv8 */ /* PMSAv8 */
ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx, ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx,
phys_ptr, attrs, prot, fsr); phys_ptr, attrs, prot, fi);
*fsr = arm_fi_to_sfsc(fi);
} else if (arm_feature(env, ARM_FEATURE_V7)) { } else if (arm_feature(env, ARM_FEATURE_V7)) {
/* PMSAv7 */ /* PMSAv7 */
ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx,
@ -10180,9 +10187,9 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op)
uint32_t tt_resp; uint32_t tt_resp;
bool r, rw, nsr, nsrw, mrvalid; bool r, rw, nsr, nsrw, mrvalid;
int prot; int prot;
ARMMMUFaultInfo fi = {};
MemTxAttrs attrs = {}; MemTxAttrs attrs = {};
hwaddr phys_addr; hwaddr phys_addr;
uint32_t fsr;
ARMMMUIdx mmu_idx; ARMMMUIdx mmu_idx;
uint32_t mregion; uint32_t mregion;
bool targetpriv; bool targetpriv;
@ -10216,7 +10223,7 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op)
if (arm_current_el(env) != 0 || alt) { if (arm_current_el(env) != 0 || alt) {
/* We can ignore the return value as prot is always set */ /* We can ignore the return value as prot is always set */
pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx,
&phys_addr, &attrs, &prot, &fsr, &mregion); &phys_addr, &attrs, &prot, &fi, &mregion);
if (mregion == -1) { if (mregion == -1) {
mrvalid = false; mrvalid = false;
mregion = 0; mregion = 0;