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IDE: replace DEBUG_IDE with tracing system

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Remove the DEBUG_IDE preprocessor definition with something more
appropriately flexible, using the trace-events subsystem.

This will be less prone to bitrot and will more effectively allow
us to target just the functions we care about.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20170901001502.29915-2-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
This commit is contained in:
John Snow 2017-09-18 15:01:25 -04:00
parent 4c93950659
commit 3eee2611dd
8 changed files with 80 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile.objs
View File

@ -155,6 +155,7 @@ trace-events-subdirs += hw/acpi
trace-events-subdirs += hw/arm trace-events-subdirs += hw/arm
trace-events-subdirs += hw/alpha trace-events-subdirs += hw/alpha
trace-events-subdirs += hw/xen trace-events-subdirs += hw/xen
trace-events-subdirs += hw/ide
trace-events-subdirs += ui trace-events-subdirs += ui
trace-events-subdirs += audio trace-events-subdirs += audio
trace-events-subdirs += net trace-events-subdirs += net

10
hw/ide/cmd646.c
View File

@ -32,6 +32,7 @@
#include "sysemu/dma.h" #include "sysemu/dma.h"
#include "hw/ide/pci.h" #include "hw/ide/pci.h"
#include "trace.h"
/* CMD646 specific */ /* CMD646 specific */
#define CFR 0x50 #define CFR 0x50
@ -195,9 +196,8 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr,
val = 0xff; val = 0xff;
break; break;
} }
#ifdef DEBUG_IDE
printf("bmdma: readb " TARGET_FMT_plx " : 0x%02x\n", addr, val); trace_bmdma_read_cmd646(addr, val);
#endif
return val; return val;
} }
@ -211,9 +211,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
return; return;
} }
#ifdef DEBUG_IDE trace_bmdma_write_cmd646(addr, val);
printf("bmdma: writeb " TARGET_FMT_plx " : 0x%" PRIx64 "\n", addr, val);
#endif
switch(addr & 3) { switch(addr & 3) {
case 0: case 0:
bmdma_cmd_writeb(bm, val); bmdma_cmd_writeb(bm, val);

65
hw/ide/core.c
View File

@ -36,6 +36,7 @@
#include "qemu/cutils.h" #include "qemu/cutils.h"
#include "hw/ide/internal.h" #include "hw/ide/internal.h"
#include "trace.h"
/* These values were based on a Seagate ST3500418AS but have been modified /* These values were based on a Seagate ST3500418AS but have been modified
to make more sense in QEMU */ to make more sense in QEMU */
@ -656,10 +657,7 @@ void ide_cancel_dma_sync(IDEState *s)
* write requests) pending and we can avoid to drain. */ * write requests) pending and we can avoid to drain. */
QLIST_FOREACH(req, &s->buffered_requests, list) { QLIST_FOREACH(req, &s->buffered_requests, list) {
if (!req->orphaned) { if (!req->orphaned) {
#ifdef DEBUG_IDE trace_ide_cancel_dma_sync_buffered(req->original_cb, req);
printf("%s: invoking cb %p of buffered request %p with"
" -ECANCELED\n", __func__, req->original_cb, req);
#endif
req->original_cb(req->original_opaque, -ECANCELED); req->original_cb(req->original_opaque, -ECANCELED);
} }
req->orphaned = true; req->orphaned = true;
@ -678,9 +676,7 @@ void ide_cancel_dma_sync(IDEState *s)
* aio operation with preadv/pwritev. * aio operation with preadv/pwritev.
*/ */
if (s->bus->dma->aiocb) { if (s->bus->dma->aiocb) {
#ifdef DEBUG_IDE trace_ide_cancel_dma_sync_remaining();
printf("%s: draining all remaining requests", __func__);
#endif
blk_drain(s->blk); blk_drain(s->blk);
assert(s->bus->dma->aiocb == NULL); assert(s->bus->dma->aiocb == NULL);
} }
@ -741,9 +737,7 @@ static void ide_sector_read(IDEState *s)
n = s->req_nb_sectors; n = s->req_nb_sectors;
} }
#if defined(DEBUG_IDE) trace_ide_sector_read(sector_num, n);
printf("sector=%" PRId64 "\n", sector_num);
#endif
if (!ide_sect_range_ok(s, sector_num, n)) { if (!ide_sect_range_ok(s, sector_num, n)) {
ide_rw_error(s); ide_rw_error(s);
@ -1005,14 +999,14 @@ static void ide_sector_write(IDEState *s)
s->status = READY_STAT | SEEK_STAT | BUSY_STAT; s->status = READY_STAT | SEEK_STAT | BUSY_STAT;
sector_num = ide_get_sector(s); sector_num = ide_get_sector(s);
#if defined(DEBUG_IDE)
printf("sector=%" PRId64 "\n", sector_num);
#endif
n = s->nsector; n = s->nsector;
if (n > s->req_nb_sectors) { if (n > s->req_nb_sectors) {
n = s->req_nb_sectors; n = s->req_nb_sectors;
} }
trace_ide_sector_write(sector_num, n);
if (!ide_sect_range_ok(s, sector_num, n)) { if (!ide_sect_range_ok(s, sector_num, n)) {
ide_rw_error(s); ide_rw_error(s);
block_acct_invalid(blk_get_stats(s->blk), BLOCK_ACCT_WRITE); block_acct_invalid(blk_get_stats(s->blk), BLOCK_ACCT_WRITE);
@ -1194,18 +1188,17 @@ static void ide_clear_hob(IDEBus *bus)
void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{ {
IDEBus *bus = opaque; IDEBus *bus = opaque;
IDEState *s = idebus_active_if(bus);
int reg_num = addr & 7;
#ifdef DEBUG_IDE trace_ide_ioport_write(addr, val, bus, s);
printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
#endif
addr &= 7;
/* ignore writes to command block while busy with previous command */ /* ignore writes to command block while busy with previous command */
if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT))) if (reg_num != 7 && (s->status & (BUSY_STAT|DRQ_STAT))) {
return; return;
}
switch(addr) { switch (reg_num) {
case 0: case 0:
break; break;
case 1: case 1:
@ -1261,9 +1254,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
static void ide_reset(IDEState *s) static void ide_reset(IDEState *s)
{ {
#ifdef DEBUG_IDE trace_ide_reset(s);
printf("ide: reset\n");
#endif
if (s->pio_aiocb) { if (s->pio_aiocb) {
blk_aio_cancel(s->pio_aiocb); blk_aio_cancel(s->pio_aiocb);
@ -2021,10 +2012,9 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val)
IDEState *s; IDEState *s;
bool complete; bool complete;
#if defined(DEBUG_IDE)
printf("ide: CMD=%02x\n", val);
#endif
s = idebus_active_if(bus); s = idebus_active_if(bus);
trace_ide_exec_cmd(bus, s, val);
/* ignore commands to non existent slave */ /* ignore commands to non existent slave */
if (s != bus->ifs && !s->blk) { if (s != bus->ifs && !s->blk) {
return; return;
@ -2062,18 +2052,18 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val)
} }
} }
uint32_t ide_ioport_read(void *opaque, uint32_t addr1) uint32_t ide_ioport_read(void *opaque, uint32_t addr)
{ {
IDEBus *bus = opaque; IDEBus *bus = opaque;
IDEState *s = idebus_active_if(bus); IDEState *s = idebus_active_if(bus);
uint32_t addr; uint32_t reg_num;
int ret, hob; int ret, hob;
addr = addr1 & 7; reg_num = addr & 7;
/* FIXME: HOB readback uses bit 7, but it's always set right now */ /* FIXME: HOB readback uses bit 7, but it's always set right now */
//hob = s->select & (1 << 7); //hob = s->select & (1 << 7);
hob = 0; hob = 0;
switch(addr) { switch (reg_num) {
case 0: case 0:
ret = 0xff; ret = 0xff;
break; break;
@ -2141,9 +2131,8 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
qemu_irq_lower(bus->irq); qemu_irq_lower(bus->irq);
break; break;
} }
#ifdef DEBUG_IDE
printf("ide: read addr=0x%x val=%02x\n", addr1, ret); trace_ide_ioport_read(addr, ret, bus, s);
#endif
return ret; return ret;
} }
@ -2159,9 +2148,8 @@ uint32_t ide_status_read(void *opaque, uint32_t addr)
} else { } else {
ret = s->status; ret = s->status;
} }
#ifdef DEBUG_IDE
printf("ide: read status addr=0x%x val=%02x\n", addr, ret); trace_ide_status_read(addr, ret, bus, s);
#endif
return ret; return ret;
} }
@ -2171,9 +2159,8 @@ void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
IDEState *s; IDEState *s;
int i; int i;
#ifdef DEBUG_IDE trace_ide_cmd_write(addr, val, bus);
printf("ide: write control addr=0x%x val=%02x\n", addr, val);
#endif
/* common for both drives */ /* common for both drives */
if (!(bus->cmd & IDE_CMD_RESET) && if (!(bus->cmd & IDE_CMD_RESET) &&
(val & IDE_CMD_RESET)) { (val & IDE_CMD_RESET)) {

17
hw/ide/pci.c
View File

@ -31,6 +31,7 @@
#include "sysemu/dma.h" #include "sysemu/dma.h"
#include "qemu/error-report.h" #include "qemu/error-report.h"
#include "hw/ide/pci.h" #include "hw/ide/pci.h"
#include "trace.h"
#define BMDMA_PAGE_SIZE 4096 #define BMDMA_PAGE_SIZE 4096
@ -196,9 +197,7 @@ static void bmdma_reset(IDEDMA *dma)
{ {
BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma);
#ifdef DEBUG_IDE trace_bmdma_reset();
printf("ide: dma_reset\n");
#endif
bmdma_cancel(bm); bmdma_cancel(bm);
bm->cmd = 0; bm->cmd = 0;
bm->status = 0; bm->status = 0;
@ -227,9 +226,7 @@ static void bmdma_irq(void *opaque, int n, int level)
void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val) void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val)
{ {
#ifdef DEBUG_IDE trace_bmdma_cmd_writeb(val);
printf("%s: 0x%08x\n", __func__, val);
#endif
/* Ignore writes to SSBM if it keeps the old value */ /* Ignore writes to SSBM if it keeps the old value */
if ((val & BM_CMD_START) != (bm->cmd & BM_CMD_START)) { if ((val & BM_CMD_START) != (bm->cmd & BM_CMD_START)) {
@ -258,9 +255,7 @@ static uint64_t bmdma_addr_read(void *opaque, hwaddr addr,
uint64_t data; uint64_t data;
data = (bm->addr >> (addr * 8)) & mask; data = (bm->addr >> (addr * 8)) & mask;
#ifdef DEBUG_IDE trace_bmdma_addr_read(data);
printf("%s: 0x%08x\n", __func__, (unsigned)data);
#endif
return data; return data;
} }
@ -271,9 +266,7 @@ static void bmdma_addr_write(void *opaque, hwaddr addr,
int shift = addr * 8; int shift = addr * 8;
uint32_t mask = (1ULL << (width * 8)) - 1; uint32_t mask = (1ULL << (width * 8)) - 1;
#ifdef DEBUG_IDE trace_bmdma_addr_write(data);
printf("%s: 0x%08x\n", __func__, (unsigned)data);
#endif
bm->addr &= ~(mask << shift); bm->addr &= ~(mask << shift);
bm->addr |= ((data & mask) << shift) & ~3; bm->addr |= ((data & mask) << shift) & ~3;
} }

11
hw/ide/piix.c
View File

@ -33,6 +33,7 @@
#include "sysemu/dma.h" #include "sysemu/dma.h"
#include "hw/ide/pci.h" #include "hw/ide/pci.h"
#include "trace.h"
static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size) static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size)
{ {
@ -54,9 +55,8 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size)
val = 0xff; val = 0xff;
break; break;
} }
#ifdef DEBUG_IDE
printf("bmdma: readb 0x%02x : 0x%02x\n", (uint8_t)addr, val); trace_bmdma_read(addr, val);
#endif
return val; return val;
} }
@ -69,9 +69,8 @@ static void bmdma_write(void *opaque, hwaddr addr,
return; return;
} }
#ifdef DEBUG_IDE trace_bmdma_write(addr, val);
printf("bmdma: writeb 0x%02x : 0x%02x\n", (uint8_t)addr, (uint8_t)val);
#endif
switch(addr & 3) { switch(addr & 3) {
case 0: case 0:
bmdma_cmd_writeb(bm, val); bmdma_cmd_writeb(bm, val);

35
hw/ide/trace-events Normal file
View File

@ -0,0 +1,35 @@
# See docs/devel/tracing.txt for syntax documentation.
# hw/ide/core.c
# portio
ide_ioport_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32"; val 0x%02"PRIx32"; bus %p IDEState %p"
ide_ioport_write(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32"; val 0x%02"PRIx32"; bus %p IDEState %p"
ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p; IDEState %p"
ide_cmd_write(uint32_t addr, uint32_t val, void *bus) "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus %p"
# misc
ide_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p; state %p; cmd 0x%02x"
ide_cancel_dma_sync_buffered(void *fn, void *req) "invoking cb %p of buffered request %p with -ECANCELED"
ide_cancel_dma_sync_remaining(void) "draining all remaining requests"
ide_sector_read(int64_t sector_num, int nsectors) "sector=%"PRId64" nsectors=%d"
ide_sector_write(int64_t sector_num, int nsectors) "sector=%"PRId64" nsectors=%d"
ide_reset(void *s) "IDEstate %p"
# BMDMA HBAs:
# hw/ide/cmd646.c
bmdma_read_cmd646(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x"
bmdma_write_cmd646(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64
# hw/ide/pci.c
bmdma_reset(void) ""
bmdma_cmd_writeb(uint32_t val) "val: 0x%08x"
bmdma_addr_read(uint64_t data) "data: 0x%016"PRIx64
bmdma_addr_write(uint64_t data) "data: 0x%016"PRIx64
# hw/ide/piix.c
bmdma_read(uint64_t addr, uint8_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x"
bmdma_write(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64
# hw/ide/via.c
bmdma_read_via(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x"
bmdma_write_via(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64

10
hw/ide/via.c
View File

@ -33,6 +33,7 @@
#include "sysemu/dma.h" #include "sysemu/dma.h"
#include "hw/ide/pci.h" #include "hw/ide/pci.h"
#include "trace.h"
static uint64_t bmdma_read(void *opaque, hwaddr addr, static uint64_t bmdma_read(void *opaque, hwaddr addr,
unsigned size) unsigned size)
@ -55,9 +56,8 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr,
val = 0xff; val = 0xff;
break; break;
} }
#ifdef DEBUG_IDE
printf("bmdma: readb 0x%02x : 0x%02x\n", addr, val); trace_bmdma_read_via(addr, val);
#endif
return val; return val;
} }
@ -70,9 +70,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
return; return;
} }
#ifdef DEBUG_IDE trace_bmdma_write_via(addr, val);
printf("bmdma: writeb 0x%02x : 0x%02x\n", addr, val);
#endif
switch (addr & 3) { switch (addr & 3) {
case 0: case 0:
bmdma_cmd_writeb(bm, val); bmdma_cmd_writeb(bm, val);

1
include/hw/ide/internal.h
View File

@ -14,7 +14,6 @@
#include "block/scsi.h" #include "block/scsi.h"
/* debug IDE devices */ /* debug IDE devices */
//#define DEBUG_IDE
//#define DEBUG_IDE_ATAPI //#define DEBUG_IDE_ATAPI
//#define DEBUG_AIO //#define DEBUG_AIO
#define USE_DMA_CDROM #define USE_DMA_CDROM