BIOS: Reenable processor SSDT generation. Don't advertise ACPI C2 or C3
support. Thanks to Avi Kivity for the pointer. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4275 c046a42c-6fe2-441c-8c8c-71466251a162
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BIN
pc-bios/bios.bin
BIN
pc-bios/bios.bin
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@ -1,10 +1,34 @@
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? _rombios_.c
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? _rombiosl_.c
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? biossums
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? rombios.s
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? rombios.sym
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? rombios.txt
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? rombios16.bin
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? rombios32.bin
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? rombios32.out
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? rombiosl.s
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? rombiosl.sym
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? rombiosl.txt
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Index: BIOS-bochs-latest
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-latest,v
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retrieving revision 1.173
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diff -u -d -p -r1.173 BIOS-bochs-latest
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Binary files /tmp/cvsItPJ31 and BIOS-bochs-latest differ
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Index: BIOS-bochs-legacy
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-legacy,v
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retrieving revision 1.33
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diff -u -d -p -r1.33 BIOS-bochs-legacy
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Binary files /tmp/cvsMYE2Kz and BIOS-bochs-legacy differ
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Index: rombios.c
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v
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retrieving revision 1.207
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diff -u -d -p -r1.207 rombios.c
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--- rombios.c 21 Apr 2008 14:22:01 -0000 1.207
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+++ rombios.c 27 Apr 2008 23:40:19 -0000
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+++ rombios.c 28 Apr 2008 07:53:57 -0000
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@@ -4404,22 +4404,25 @@ BX_DEBUG_INT15("case default:\n");
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#endif // BX_USE_PS2_MOUSE
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@ -128,7 +152,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
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retrieving revision 1.6
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diff -u -d -p -r1.6 rombios.h
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--- rombios.h 26 Jan 2008 09:15:27 -0000 1.6
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+++ rombios.h 27 Apr 2008 23:40:19 -0000
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+++ rombios.h 28 Apr 2008 07:53:57 -0000
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@@ -19,7 +19,7 @@
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// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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@ -144,7 +168,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
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retrieving revision 1.26
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diff -u -d -p -r1.26 rombios32.c
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--- rombios32.c 8 Apr 2008 16:41:18 -0000 1.26
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+++ rombios32.c 27 Apr 2008 23:40:19 -0000
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+++ rombios32.c 28 Apr 2008 07:53:58 -0000
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@@ -478,7 +478,12 @@ void smp_probe(void)
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sipi_vector = AP_BOOT_ADDR >> 12;
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writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
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@ -158,42 +182,15 @@ diff -u -d -p -r1.26 rombios32.c
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smp_cpus = readw((void *)CPU_COUNT_ADDR);
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}
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@@ -1081,7 +1086,7 @@ struct rsdp_descriptor /* Root S
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struct rsdt_descriptor_rev1
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{
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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- uint32_t table_offset_entry [3]; /* Array of pointers to other */
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+ uint32_t table_offset_entry [2]; /* Array of pointers to other */
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/* ACPI tables */
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};
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@@ -1335,8 +1340,8 @@ void acpi_bios_init(void)
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struct fadt_descriptor_rev1 *fadt;
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struct facs_descriptor_rev1 *facs;
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struct multiple_apic_table *madt;
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- uint8_t *dsdt, *ssdt;
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- uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr, ssdt_addr;
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+ uint8_t *dsdt;
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+ uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr;
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uint32_t acpi_tables_size, madt_addr, madt_size;
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int i;
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@@ -1370,10 +1375,6 @@ void acpi_bios_init(void)
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dsdt = (void *)(addr);
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addr += sizeof(AmlCode);
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- ssdt_addr = addr;
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- ssdt = (void *)(addr);
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- addr += acpi_build_processor_ssdt(ssdt);
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-
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addr = (addr + 7) & ~7;
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madt_addr = addr;
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madt_size = sizeof(*madt) +
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@@ -1403,7 +1404,6 @@ void acpi_bios_init(void)
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memset(rsdt, 0, sizeof(*rsdt));
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rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr);
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rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr);
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- rsdt->table_offset_entry[2] = cpu_to_le32(ssdt_addr);
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acpi_build_table_header((struct acpi_table_header *)rsdt,
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"RSDT", sizeof(*rsdt), 1);
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@@ -1423,9 +1428,8 @@ void acpi_bios_init(void)
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm_tmr_len = 4;
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- fadt->plvl2_lat = cpu_to_le16(50);
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- fadt->plvl3_lat = cpu_to_le16(50);
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- fadt->plvl3_lat = cpu_to_le16(50);
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+ fadt->plvl2_lat = cpu_to_le16(0x0fff); // C2 state not supported
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+ fadt->plvl3_lat = cpu_to_le16(0x0fff); // C3 state not supported
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/* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */
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fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6));
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acpi_build_table_header((struct acpi_table_header *)fadt, "FACP",
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