mst_fpga: correct irq level settings
Final corrections for IRQ levels that are set by mst_fpga: * Don't retranslate IRQ if previously IRQ was masked. * After setting or clearing IRQs through register, apply mask before setting parent IRQ level. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
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@ -50,7 +50,7 @@ static void
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mst_fpga_set_irq(void *opaque, int irq, int level)
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{
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mst_irq_state *s = (mst_irq_state *)opaque;
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uint32_t oldint = s->intsetclr;
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uint32_t oldint = s->intsetclr & s->intmskena;
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if (level)
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s->prev_level |= 1u << irq;
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@ -139,7 +139,7 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
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break;
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case MST_INTSETCLR: /* clear or set interrupt */
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s->intsetclr = (value & 0xFEEFF);
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qemu_set_irq(s->parent, s->intsetclr);
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qemu_set_irq(s->parent, s->intsetclr & s->intmskena);
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break;
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case MST_PCMCIA0:
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s->pcmcia0 = value;
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