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target-arm queue:

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* hw/intc/arm_gicv3_its: Add missing newlines to process_mapc() logging
  * target/arm: Fix sve_ld1_z and sve_st1_z vs MMIO
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Merge tag 'pull-target-arm-20220325' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * hw/intc/arm_gicv3_its: Add missing newlines to process_mapc() logging
 * target/arm: Fix sve_ld1_z and sve_st1_z vs MMIO

# gpg: Signature made Fri 25 Mar 2022 14:56:48 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20220325' of https://git.linaro.org/people/pmaydell/qemu-arm:
  hw/intc/arm_gicv3_its: Add missing newlines to process_mapc() logging
  target/arm: Fix sve_ld1_z and sve_st1_z vs MMIO

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2022-03-25 15:02:39 +00:00
commit 3d31fe4d66
2 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/intc/arm_gicv3_its.c
View File

@ -524,12 +524,12 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, const uint64_t *cmdpkt)
trace_gicv3_its_cmd_mapc(icid, cte.rdbase, cte.valid);
if (icid >= s->ct.num_entries) {
qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%d", icid);
qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%x\n", icid);
return CMD_CONTINUE;
}
if (cte.valid && cte.rdbase >= s->gicv3->num_cpu) {
qemu_log_mask(LOG_GUEST_ERROR,
"ITS MAPC: invalid RDBASE %u ", cte.rdbase);
"ITS MAPC: invalid RDBASE %u\n", cte.rdbase);
return CMD_CONTINUE;
}

10
target/arm/sve_helper.c
View File

@ -6734,7 +6734,11 @@ void sve_ld1_z(CPUARMState *env, void *vd, uint64_t *vg, void *vm,
if (mtedesc && arm_tlb_mte_tagged(&info.attrs)) {
mte_check(env, mtedesc, addr, retaddr);
}
host_fn(&scratch, reg_off, info.host);
if (unlikely(info.flags & TLB_MMIO)) {
tlb_fn(env, &scratch, reg_off, addr, retaddr);
} else {
host_fn(&scratch, reg_off, info.host);
}
} else {
/* Element crosses the page boundary. */
sve_probe_page(&info2, false, env, addr + in_page, 0,
@ -7112,7 +7116,9 @@ void sve_st1_z(CPUARMState *env, void *vd, uint64_t *vg, void *vm,
if (likely(in_page >= msize)) {
sve_probe_page(&info, false, env, addr, 0, MMU_DATA_STORE,
mmu_idx, retaddr);
host[i] = info.host;
if (!(info.flags & TLB_MMIO)) {
host[i] = info.host;
}
} else {
/*
* Element crosses the page boundary.