GPIO I2C rework
Reqrite bitbanging I2C implementation. New code improves stop/start condition handling, and gives more accurate input line level. Introduce intermediate abstraction layer for I2C bitbanging that is not connected via a GPIO port. Signed-off-by: Paul Brook <paul@codesourcery.com>
This commit is contained in:
Paul Brook
parent
1dfe3943e9
commit
3cd035d863
271
hw/bitbang_i2c.c
271
hw/bitbang_i2c.c
@ -7,12 +7,20 @@
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* This code is licenced under the GNU GPL v2.
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*/
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#include "hw.h"
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#include "i2c.h"
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#include "bitbang_i2c.h"
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#include "sysbus.h"
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//#define DEBUG_BITBANG_I2C
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#ifdef DEBUG_BITBANG_I2C
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#define DPRINTF(fmt, ...) \
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do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while(0)
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#endif
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typedef enum bitbang_i2c_state {
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STOPPED = 0,
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INITIALIZING,
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SENDING_BIT7,
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SENDING_BIT6,
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SENDING_BIT5,
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@ -33,138 +41,171 @@ typedef enum bitbang_i2c_state {
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SENDING_ACK
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} bitbang_i2c_state;
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typedef struct bitbang_i2c_interface {
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SysBusDevice busdev;
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struct bitbang_i2c_interface {
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i2c_bus *bus;
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bitbang_i2c_state state;
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int last_data;
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int last_clock;
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int device_out;
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uint8_t buffer;
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int current_addr;
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qemu_irq out;
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} bitbang_i2c_interface;
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};
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static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
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{
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DPRINTF("STOP\n");
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if (i2c->current_addr >= 0)
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i2c_end_transfer(i2c->bus);
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i2c->current_addr = -1;
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i2c->state = STOPPED;
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}
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static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
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/* Set device data pin. */
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static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
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{
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bitbang_i2c_interface *i2c = opaque;
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int data;
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int clock;
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int data_goes_up;
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int data_goes_down;
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int clock_goes_up;
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int clock_goes_down;
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/* get pins states */
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data = i2c->last_data;
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clock = i2c->last_clock;
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if (irq == 0)
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data = level;
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if (irq == 1)
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clock = level;
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/* compute pins changes */
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data_goes_up = data == 1 && i2c->last_data == 0;
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data_goes_down = data == 0 && i2c->last_data == 1;
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clock_goes_up = clock == 1 && i2c->last_clock == 0;
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clock_goes_down = clock == 0 && i2c->last_clock == 1;
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if (data_goes_up == 0 && data_goes_down == 0 &&
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clock_goes_up == 0 && clock_goes_down == 0)
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return;
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if (!i2c)
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return;
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if ((RECEIVING_BIT7 > i2c->state && i2c->state > RECEIVING_BIT0)
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|| i2c->state == WAITING_FOR_ACK)
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qemu_set_irq(i2c->out, 0);
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switch (i2c->state) {
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case STOPPED:
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if (data_goes_down && clock == 1)
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i2c->state = INITIALIZING;
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break;
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case INITIALIZING:
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if (clock_goes_down && data == 0)
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i2c->state = SENDING_BIT7;
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else
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bitbang_i2c_enter_stop(i2c);
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break;
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case SENDING_BIT7 ... SENDING_BIT0:
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if (clock_goes_down) {
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i2c->buffer = (i2c->buffer << 1) | data;
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/* will end up in WAITING_FOR_ACK */
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i2c->state++;
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} else if (data_goes_up && clock == 1)
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bitbang_i2c_enter_stop(i2c);
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break;
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case WAITING_FOR_ACK:
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if (clock_goes_down) {
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if (i2c->current_addr < 0) {
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i2c->current_addr = i2c->buffer;
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i2c_start_transfer(i2c->bus, (i2c->current_addr & 0xfe) / 2,
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i2c->buffer & 1);
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} else
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i2c_send(i2c->bus, i2c->buffer);
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if (i2c->current_addr & 1) {
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i2c->state = RECEIVING_BIT7;
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i2c->buffer = i2c_recv(i2c->bus);
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} else
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i2c->state = SENDING_BIT7;
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} else if (data_goes_up && clock == 1)
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bitbang_i2c_enter_stop(i2c);
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break;
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case RECEIVING_BIT7 ... RECEIVING_BIT0:
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qemu_set_irq(i2c->out, i2c->buffer >> 7);
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if (clock_goes_down) {
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/* will end up in SENDING_ACK */
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i2c->state++;
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i2c->buffer <<= 1;
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} else if (data_goes_up && clock == 1)
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bitbang_i2c_enter_stop(i2c);
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break;
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case SENDING_ACK:
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if (clock_goes_down) {
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i2c->state = RECEIVING_BIT7;
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if (data == 0)
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i2c->buffer = i2c_recv(i2c->bus);
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else
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i2c_nack(i2c->bus);
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} else if (data_goes_up && clock == 1)
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bitbang_i2c_enter_stop(i2c);
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break;
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}
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i2c->last_data = data;
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i2c->last_clock = clock;
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i2c->device_out = level;
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//DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
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return level & i2c->last_data;
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}
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static int bitbang_i2c_init(SysBusDevice *dev)
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/* Leave device data pin unodified. */
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static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
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{
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bitbang_i2c_interface *s = FROM_SYSBUS(bitbang_i2c_interface, dev);
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return bitbang_i2c_ret(i2c, i2c->device_out);
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}
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/* Returns data line level. */
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int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
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{
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int data;
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if (level != 0 && level != 1) {
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abort();
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}
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if (line == BITBANG_I2C_SDA) {
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if (level == i2c->last_data) {
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return bitbang_i2c_nop(i2c);
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}
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i2c->last_data = level;
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if (i2c->last_clock == 0) {
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return bitbang_i2c_nop(i2c);
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}
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if (level == 0) {
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DPRINTF("START\n");
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/* START condition. */
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i2c->state = SENDING_BIT7;
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i2c->current_addr = -1;
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} else {
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/* STOP condition. */
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bitbang_i2c_enter_stop(i2c);
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}
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return bitbang_i2c_ret(i2c, 1);
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}
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data = i2c->last_data;
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if (i2c->last_clock == level) {
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return bitbang_i2c_nop(i2c);
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}
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i2c->last_clock = level;
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if (level == 0) {
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/* State is set/read at the start of the clock pulse.
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release the data line at the end. */
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return bitbang_i2c_ret(i2c, 1);
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}
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switch (i2c->state) {
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case STOPPED:
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return bitbang_i2c_ret(i2c, 1);
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case SENDING_BIT7 ... SENDING_BIT0:
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i2c->buffer = (i2c->buffer << 1) | data;
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/* will end up in WAITING_FOR_ACK */
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i2c->state++;
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return bitbang_i2c_ret(i2c, 1);
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case WAITING_FOR_ACK:
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if (i2c->current_addr < 0) {
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i2c->current_addr = i2c->buffer;
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DPRINTF("Address 0x%02x\n", i2c->current_addr);
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i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
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i2c->current_addr & 1);
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} else {
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DPRINTF("Sent 0x%02x\n", i2c->buffer);
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i2c_send(i2c->bus, i2c->buffer);
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}
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if (i2c->current_addr & 1) {
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i2c->state = RECEIVING_BIT7;
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} else {
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i2c->state = SENDING_BIT7;
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}
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return bitbang_i2c_ret(i2c, 0);
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case RECEIVING_BIT7:
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i2c->buffer = i2c_recv(i2c->bus);
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DPRINTF("RX byte 0x%02x\n", i2c->buffer);
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/* Fall through... */
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case RECEIVING_BIT6 ... RECEIVING_BIT0:
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data = i2c->buffer >> 7;
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/* will end up in SENDING_ACK */
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i2c->state++;
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i2c->buffer <<= 1;
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return bitbang_i2c_ret(i2c, data);
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case SENDING_ACK:
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i2c->state = RECEIVING_BIT7;
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if (data != 0) {
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DPRINTF("NACKED\n");
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i2c_nack(i2c->bus);
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} else {
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DPRINTF("ACKED\n");
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}
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return bitbang_i2c_ret(i2c, 1);
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}
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abort();
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}
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bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus)
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{
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bitbang_i2c_interface *s;
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s = qemu_mallocz(sizeof(bitbang_i2c_interface));
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s->bus = bus;
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s->last_data = 1;
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s->last_clock = 1;
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s->device_out = 1;
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return s;
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}
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/* GPIO interface. */
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typedef struct {
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SysBusDevice busdev;
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bitbang_i2c_interface *bitbang;
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int last_level;
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qemu_irq out;
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} GPIOI2CState;
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static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
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{
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GPIOI2CState *s = opaque;
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level = bitbang_i2c_set(s->bitbang, irq, level);
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if (level != s->last_level) {
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s->last_level = level;
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qemu_set_irq(s->out, level);
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}
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}
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static int gpio_i2c_init(SysBusDevice *dev)
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{
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GPIOI2CState *s = FROM_SYSBUS(GPIOI2CState, dev);
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i2c_bus *bus;
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sysbus_init_mmio(dev, 0x0, 0);
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bus = i2c_init_bus(&dev->qdev, "i2c");
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s->bus = bus;
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s->last_data = 1;
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s->last_clock = 1;
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s->bitbang = bitbang_i2c_init(bus);
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qdev_init_gpio_in(&dev->qdev, bitbang_i2c_gpio_set, 2);
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qdev_init_gpio_out(&dev->qdev, &s->out, 1);
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@ -172,10 +213,16 @@ static int bitbang_i2c_init(SysBusDevice *dev)
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return 0;
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}
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static SysBusDeviceInfo gpio_i2c_info = {
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.init = gpio_i2c_init,
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.qdev.name = "gpio_i2c",
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.qdev.desc = "Virtual GPIO to I2C bridge",
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.qdev.size = sizeof(GPIOI2CState),
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};
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static void bitbang_i2c_register(void)
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{
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sysbus_register_dev("bitbang_i2c",
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sizeof(bitbang_i2c_interface), bitbang_i2c_init);
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sysbus_register_withprop(&gpio_i2c_info);
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}
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device_init(bitbang_i2c_register)
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14
hw/bitbang_i2c.h
Normal file
14
hw/bitbang_i2c.h
Normal file
@ -0,0 +1,14 @@
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#ifndef BITBANG_I2C_H
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#define BITBANG_I2C_H
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#include "i2c.h"
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typedef struct bitbang_i2c_interface bitbang_i2c_interface;
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#define BITBANG_I2C_SDA 0
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#define BITBANG_I2C_SCL 1
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bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus);
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int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level);
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#endif
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@ -1565,7 +1565,7 @@ static void musicpal_init(ram_addr_t ram_size,
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musicpal_misc_init();
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dev = sysbus_create_simple("musicpal_gpio", MP_GPIO_BASE, pic[MP_GPIO_IRQ]);
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i2c_dev = sysbus_create_simple("bitbang_i2c", 0, NULL);
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i2c_dev = sysbus_create_simple("gpio_i2c", 0, NULL);
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i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, "i2c");
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lcd_dev = sysbus_create_simple("musicpal_lcd", MP_LCD_BASE, NULL);
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