Rename cpu_physical_memory_write_rom() to address_space_write_rom()
The API of cpu_physical_memory_write_rom() is odd, because it takes an AddressSpace, unlike all the other cpu_physical_memory_* access functions. Rename it to address_space_write_rom(), and bring its API into line with address_space_write(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20181122133507.30950-3-peter.maydell@linaro.org
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@ -253,6 +253,22 @@ Regexes for git grep
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- ``\<address_space_ldu\?[bwql]\(_[lb]e\)\?\>``
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- ``\<address_space_ldu\?[bwql]\(_[lb]e\)\?\>``
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- ``\<address_space_st[bwql]\(_[lb]e\)\?\>``
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- ``\<address_space_st[bwql]\(_[lb]e\)\?\>``
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``address_space_write_rom``
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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This function performs a write by physical address like
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``address_space_write``, except that if the write is to a ROM then
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the ROM contents will be modified, even though a write by the guest
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CPU to the ROM would be ignored. This is used for non-guest writes
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like writes from the gdb debug stub or initial loading of ROM contents.
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Note that portions of the write which attempt to write data to a
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device will be silently ignored -- only real RAM and ROM will
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be written to.
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Regexes for git grep
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- ``address_space_write_rom``
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``{ld,st}*_phys``
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``{ld,st}*_phys``
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~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~
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@ -315,25 +331,6 @@ For new code they are better avoided:
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Regexes for git grep
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Regexes for git grep
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- ``\<cpu_physical_memory_\(read\|write\|rw\)\>``
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- ``\<cpu_physical_memory_\(read\|write\|rw\)\>``
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``cpu_physical_memory_write_rom``
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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This function performs a write by physical address like
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``address_space_write``, except that if the write is to a ROM then
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the ROM contents will be modified, even though a write by the guest
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CPU to the ROM would be ignored.
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Note that unlike ``cpu_physical_memory_write()`` this function takes
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an AddressSpace argument, but unlike ``address_space_write()`` this
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function does not take a ``MemTxAttrs`` or return a ``MemTxResult``.
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**TODO**: we should probably clean up this inconsistency and
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turn the function into ``address_space_write_rom`` with an API
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matching ``address_space_write``.
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``cpu_physical_memory_write_rom``
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``cpu_memory_rw_debug``
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``cpu_memory_rw_debug``
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~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~
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10
exec.c
10
exec.c
@ -3430,10 +3430,11 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as,
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}
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}
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/* used for ROM loading : can write in RAM and ROM */
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/* used for ROM loading : can write in RAM and ROM */
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void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
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MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
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MemTxAttrs attrs,
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const uint8_t *buf, int len)
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const uint8_t *buf, int len)
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{
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{
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address_space_write_rom_internal(as, addr, MEMTXATTRS_UNSPECIFIED,
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return address_space_write_rom_internal(as, addr, attrs,
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buf, len, WRITE_DATA);
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buf, len, WRITE_DATA);
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}
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}
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@ -3879,8 +3880,9 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
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l = len;
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l = len;
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phys_addr += (addr & ~TARGET_PAGE_MASK);
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phys_addr += (addr & ~TARGET_PAGE_MASK);
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if (is_write) {
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if (is_write) {
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cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
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address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
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phys_addr, buf, l);
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MEMTXATTRS_UNSPECIFIED,
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buf, l);
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} else {
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} else {
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address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
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address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
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MEMTXATTRS_UNSPECIFIED,
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MEMTXATTRS_UNSPECIFIED,
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@ -1103,8 +1103,8 @@ static void rom_reset(void *unused)
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void *host = memory_region_get_ram_ptr(rom->mr);
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void *host = memory_region_get_ram_ptr(rom->mr);
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memcpy(host, rom->data, rom->datasize);
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memcpy(host, rom->data, rom->datasize);
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} else {
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} else {
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cpu_physical_memory_write_rom(rom->as, rom->addr, rom->data,
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address_space_write_rom(rom->as, rom->addr, MEMTXATTRS_UNSPECIFIED,
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rom->datasize);
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rom->data, rom->datasize);
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}
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}
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if (rom->isrom) {
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if (rom->isrom) {
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/* rom needs to be written only once */
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/* rom needs to be written only once */
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@ -122,8 +122,9 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
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}
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}
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vapic_state.irr = vector & 0xff;
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vapic_state.irr = vector & 0xff;
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cpu_physical_memory_write_rom(&address_space_memory,
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address_space_write_rom(&address_space_memory,
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s->vapic_paddr + start,
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s->vapic_paddr + start,
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MEMTXATTRS_UNSPECIFIED,
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((void *)&vapic_state) + start, length);
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((void *)&vapic_state) + start, length);
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}
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}
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}
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}
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@ -448,7 +448,7 @@ static int tz_mpc_attrs_to_index(IOMMUMemoryRegion *iommu, MemTxAttrs attrs)
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{
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{
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/* We treat unspecified attributes like secure. Transactions with
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/* We treat unspecified attributes like secure. Transactions with
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* unspecified attributes come from places like
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* unspecified attributes come from places like
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* cpu_physical_memory_write_rom() for initial image load, and we want
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* rom_reset() for initial image load, and we want
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* those to pass through the from-reset "everything is secure" config.
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* those to pass through the from-reset "everything is secure" config.
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* All the real during-emulation transactions from the CPU will
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* All the real during-emulation transactions from the CPU will
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* specify attributes.
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* specify attributes.
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@ -559,8 +559,9 @@ static void idreg_init(hwaddr addr)
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s = SYS_BUS_DEVICE(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(s, 0, addr);
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sysbus_mmio_map(s, 0, addr);
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cpu_physical_memory_write_rom(&address_space_memory,
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address_space_write_rom(&address_space_memory, addr,
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addr, idreg_data, sizeof(idreg_data));
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MEMTXATTRS_UNSPECIFIED,
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idreg_data, sizeof(idreg_data));
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}
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}
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#define MACIO_ID_REGISTER(obj) \
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#define MACIO_ID_REGISTER(obj) \
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@ -111,8 +111,6 @@ bool cpu_physical_memory_is_io(hwaddr phys_addr);
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*/
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*/
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void qemu_flush_coalesced_mmio_buffer(void);
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void qemu_flush_coalesced_mmio_buffer(void);
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void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
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const uint8_t *buf, int len);
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void cpu_flush_icache_range(hwaddr start, int len);
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void cpu_flush_icache_range(hwaddr start, int len);
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extern struct MemoryRegion io_mem_rom;
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extern struct MemoryRegion io_mem_rom;
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@ -1792,6 +1792,32 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
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MemTxAttrs attrs,
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MemTxAttrs attrs,
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const uint8_t *buf, int len);
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const uint8_t *buf, int len);
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/**
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* address_space_write_rom: write to address space, including ROM.
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*
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* This function writes to the specified address space, but will
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* write data to both ROM and RAM. This is used for non-guest
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* writes like writes from the gdb debug stub or initial loading
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* of ROM contents.
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*
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* Note that portions of the write which attempt to write data to
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* a device will be silently ignored -- only real RAM and ROM will
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* be written to.
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*
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* Return a MemTxResult indicating whether the operation succeeded
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* or failed (eg unassigned memory, device rejected the transaction,
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* IOMMU fault).
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*
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* @as: #AddressSpace to be accessed
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* @addr: address within that address space
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* @attrs: memory transaction attributes
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* @buf: buffer with the data transferred
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* @len: the number of bytes to write
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*/
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MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
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MemTxAttrs attrs,
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const uint8_t *buf, int len);
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/* address_space_ld*: load from an address space
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/* address_space_ld*: load from an address space
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* address_space_st*: store to an address space
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* address_space_st*: store to an address space
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*
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*
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