target-ppc: General Support for VSX Helpers
This patch adds general support that will be used by the VSX helper routines: - a union describing the various VSR subfields. - access routines to get and set VSRs - VSX decoders - a general routine to generate a handler that invokes a VSX helper. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -1717,3 +1717,44 @@ uint32_t helper_efdcmpeq(CPUPPCState *env, uint64_t op1, uint64_t op2)
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/* XXX: TODO: test special values (NaN, infinites, ...) */
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return helper_efdtsteq(env, op1, op2);
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}
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#define DECODE_SPLIT(opcode, shift1, nb1, shift2, nb2) \
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(((((opcode) >> (shift1)) & ((1 << (nb1)) - 1)) << nb2) | \
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(((opcode) >> (shift2)) & ((1 << (nb2)) - 1)))
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#define xT(opcode) DECODE_SPLIT(opcode, 0, 1, 21, 5)
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#define xA(opcode) DECODE_SPLIT(opcode, 2, 1, 16, 5)
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#define xB(opcode) DECODE_SPLIT(opcode, 1, 1, 11, 5)
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#define xC(opcode) DECODE_SPLIT(opcode, 3, 1, 6, 5)
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#define BF(opcode) (((opcode) >> (31-8)) & 7)
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typedef union _ppc_vsr_t {
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uint64_t u64[2];
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uint32_t u32[4];
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float32 f32[4];
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float64 f64[2];
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} ppc_vsr_t;
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static void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
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{
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if (n < 32) {
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vsr->f64[0] = env->fpr[n];
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vsr->u64[1] = env->vsr[n];
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} else {
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vsr->u64[0] = env->avr[n-32].u64[0];
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vsr->u64[1] = env->avr[n-32].u64[1];
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}
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}
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static void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
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{
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if (n < 32) {
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env->fpr[n] = vsr->f64[0];
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env->vsr[n] = vsr->u64[1];
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} else {
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env->avr[n-32].u64[0] = vsr->u64[0];
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env->avr[n-32].u64[1] = vsr->u64[1];
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}
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}
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#define float64_to_float64(x, env) x
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@ -7289,6 +7289,20 @@ VSX_VECTOR_MOVE(xvnabssp, OP_NABS, SGN_MASK_SP)
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VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP)
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VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP)
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#define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \
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static void gen_##name(DisasContext * ctx) \
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{ \
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TCGv_i32 opc; \
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if (unlikely(!ctx->vsx_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VSXU); \
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return; \
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} \
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/* NIP cannot be restored if the memory exception comes from an helper */ \
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gen_update_nip(ctx, ctx->nip - 4); \
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opc = tcg_const_i32(ctx->opcode); \
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gen_helper_##name(cpu_env, opc); \
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tcg_temp_free_i32(opc); \
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}
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#define VSX_LOGICAL(name, tcg_op) \
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static void glue(gen_, name)(DisasContext * ctx) \
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