fixed qemu_st8 insn - prologue saved too many registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4418 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -215,7 +215,7 @@ static inline int tcg_target_const_match(tcg_target_long val,
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#define P_EXT 0x100 /* 0x0f opcode prefix */
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#define P_REXW 0x200 /* set rex.w = 1 */
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#define P_REX 0x400 /* force rex usage */
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#define P_REXB 0x400 /* force rex use for byte registers */
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static const uint8_t tcg_cond_to_jcc[10] = {
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[TCG_COND_EQ] = JCC_JE,
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@ -235,7 +235,7 @@ static inline void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x)
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int rex;
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rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) |
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((x >> 2) & 2) | ((rm >> 3) & 1);
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if (rex || (opc & P_REX)) {
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if (rex || ((opc & P_REXB) && r >= 4)) {
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tcg_out8(s, rex | 0x40);
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}
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if (opc & P_EXT)
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@ -748,7 +748,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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switch(opc) {
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case 0:
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/* movzbl */
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tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_RSI, data_reg);
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tcg_out_modrm(s, 0xb6 | P_EXT | P_REXB, TCG_REG_RSI, data_reg);
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break;
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case 1:
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/* movzwl */
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@ -791,7 +791,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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switch(opc) {
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case 0:
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/* movb */
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tcg_out_modrm_offset(s, 0x88 | P_REX, data_reg, r0, 0);
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tcg_out_modrm_offset(s, 0x88 | P_REXB, data_reg, r0, 0);
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break;
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case 1:
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if (bswap) {
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@ -929,7 +929,7 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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case INDEX_op_st8_i32:
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case INDEX_op_st8_i64:
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/* movb */
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tcg_out_modrm_offset(s, 0x88 | P_REX, args[0], args[1], args[2]);
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tcg_out_modrm_offset(s, 0x88 | P_REXB, args[0], args[1], args[2]);
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break;
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case INDEX_op_st16_i32:
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case INDEX_op_st16_i64:
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@ -1133,8 +1133,6 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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}
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static int tcg_target_callee_save_regs[] = {
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TCG_REG_R10,
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TCG_REG_R11,
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TCG_REG_RBP,
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TCG_REG_RBX,
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TCG_REG_R12,
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@ -1286,6 +1284,6 @@ void tcg_target_init(TCGContext *s)
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tcg_regset_clear(s->reserved_regs);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_RSP);
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tcg_add_target_add_op_defs(x86_64_op_defs);
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}
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