tcg/arm: Support INDEX_op_extract2_i32
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -116,7 +116,7 @@ extern bool use_idiv_instructions;
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#define TCG_TARGET_HAS_deposit_i32 use_armv7_instructions
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#define TCG_TARGET_HAS_extract_i32 use_armv7_instructions
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#define TCG_TARGET_HAS_sextract_i32 use_armv7_instructions
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#define TCG_TARGET_HAS_extract2_i32 0
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#define TCG_TARGET_HAS_extract2_i32 1
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#define TCG_TARGET_HAS_movcond_i32 1
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#define TCG_TARGET_HAS_mulu2_i32 1
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#define TCG_TARGET_HAS_muls2_i32 1
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@ -2064,6 +2064,27 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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case INDEX_op_sextract_i32:
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tcg_out_sextract(s, COND_AL, args[0], args[1], args[2], args[3]);
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break;
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case INDEX_op_extract2_i32:
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/* ??? These optimization vs zero should be generic. */
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/* ??? But we can't substitute 2 for 1 in the opcode stream yet. */
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if (const_args[1]) {
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if (const_args[2]) {
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tcg_out_movi(s, TCG_TYPE_REG, args[0], 0);
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} else {
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tcg_out_dat_reg(s, COND_AL, ARITH_MOV, args[0], 0,
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args[2], SHIFT_IMM_LSL(32 - args[3]));
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}
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} else if (const_args[2]) {
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tcg_out_dat_reg(s, COND_AL, ARITH_MOV, args[0], 0,
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args[1], SHIFT_IMM_LSR(args[3]));
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} else {
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/* We can do extract2 in 2 insns, vs the 3 required otherwise. */
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tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP, 0,
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args[2], SHIFT_IMM_LSL(32 - args[3]));
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tcg_out_dat_reg(s, COND_AL, ARITH_ORR, args[0], TCG_REG_TMP,
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args[1], SHIFT_IMM_LSR(args[3]));
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}
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break;
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case INDEX_op_div_i32:
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tcg_out_sdiv(s, COND_AL, args[0], args[1], args[2]);
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@ -2108,6 +2129,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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= { .args_ct_str = { "s", "s", "s", "s" } };
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static const TCGTargetOpDef br
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= { .args_ct_str = { "r", "rIN" } };
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static const TCGTargetOpDef ext2
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= { .args_ct_str = { "r", "rZ", "rZ" } };
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static const TCGTargetOpDef dep
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= { .args_ct_str = { "r", "0", "rZ" } };
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static const TCGTargetOpDef movc
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@ -2174,6 +2197,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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return &br;
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case INDEX_op_deposit_i32:
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return &dep;
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case INDEX_op_extract2_i32:
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return &ext2;
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case INDEX_op_movcond_i32:
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return &movc;
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case INDEX_op_add2_i32:
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