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hw/arm/smmuv3: Update translation config to hold stage-2

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In preparation for adding stage-2 support, add a S2 config
struct(SMMUS2Cfg), composed of the following fields and embedded in
the main SMMUTransCfg:
 -tsz: Size of IPA input region (S2T0SZ)
 -sl0: Start level of translation (S2SL0)
 -affd: AF Fault Disable (S2AFFD)
 -record_faults: Record fault events (S2R)
 -granule_sz: Granule page shift (based on S2TG)
 -vmid: Virtual Machine ID (S2VMID)
 -vttb: Address of translation table base (S2TTB)
 -eff_ps: Effective PA output range (based on S2PS)

They will be used in the next patches in stage-2 address translation.

The fields in SMMUS2Cfg, are reordered to make the shared and stage-1
fields next to each other, this reordering didn't change the struct
size (104 bytes before and after).

Stage-1 only fields: aa64, asid, tt, ttb, tbi, record_faults, oas.
oas is stage-1 output address size. However, it is used to check
input address in case stage-1 is unimplemented or bypassed according
to SMMUv3 manual IHI0070.E "3.4. Address sizes"

Shared fields: stage, disabled, bypassed, aborted, iotlb_*.

No functional change intended.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Message-id: 20230516203327.2051088-3-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Mostafa Saleh 2023-05-25 10:37:49 +01:00 committed by Peter Maydell
parent 263d0e4867
commit 3b736c6184
1 changed files with 19 additions and 3 deletions
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22
include/hw/arm/smmu-common.h
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@ -58,25 +58,41 @@ typedef struct SMMUTLBEntry {
uint8_t granule; uint8_t granule;
} SMMUTLBEntry; } SMMUTLBEntry;
/* Stage-2 configuration. */
typedef struct SMMUS2Cfg {
uint8_t tsz; /* Size of IPA input region (S2T0SZ) */
uint8_t sl0; /* Start level of translation (S2SL0) */
bool affd; /* AF Fault Disable (S2AFFD) */
bool record_faults; /* Record fault events (S2R) */
uint8_t granule_sz; /* Granule page shift (based on S2TG) */
uint8_t eff_ps; /* Effective PA output range (based on S2PS) */
uint16_t vmid; /* Virtual Machine ID (S2VMID) */
uint64_t vttb; /* Address of translation table base (S2TTB) */
} SMMUS2Cfg;
/* /*
* Generic structure populated by derived SMMU devices * Generic structure populated by derived SMMU devices
* after decoding the configuration information and used as * after decoding the configuration information and used as
* input to the page table walk * input to the page table walk
*/ */
typedef struct SMMUTransCfg { typedef struct SMMUTransCfg {
/* Shared fields between stage-1 and stage-2. */
int stage; /* translation stage */ int stage; /* translation stage */
bool aa64; /* arch64 or aarch32 translation table */
bool disabled; /* smmu is disabled */ bool disabled; /* smmu is disabled */
bool bypassed; /* translation is bypassed */ bool bypassed; /* translation is bypassed */
bool aborted; /* translation is aborted */ bool aborted; /* translation is aborted */
uint32_t iotlb_hits; /* counts IOTLB hits */
uint32_t iotlb_misses; /* counts IOTLB misses*/
/* Used by stage-1 only. */
bool aa64; /* arch64 or aarch32 translation table */
bool record_faults; /* record fault events */ bool record_faults; /* record fault events */
uint64_t ttb; /* TT base address */ uint64_t ttb; /* TT base address */
uint8_t oas; /* output address width */ uint8_t oas; /* output address width */
uint8_t tbi; /* Top Byte Ignore */ uint8_t tbi; /* Top Byte Ignore */
uint16_t asid; uint16_t asid;
SMMUTransTableInfo tt[2]; SMMUTransTableInfo tt[2];
uint32_t iotlb_hits; /* counts IOTLB hits for this asid */ /* Used by stage-2 only. */
uint32_t iotlb_misses; /* counts IOTLB misses for this asid */ struct SMMUS2Cfg s2cfg;
} SMMUTransCfg; } SMMUTransCfg;
typedef struct SMMUDevice { typedef struct SMMUDevice {