accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
For TBs crossing page boundaries, the 2nd page will never be recorded/removed, as the index of the 2nd page is computed from the address of the 1st page. This is due to a typo, fix it. Cc: qemu-stable@nongnu.org Fixes: deba78709a ("accel/tcg: Always lock pages before translation") Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240612133031.15298-1-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -713,7 +713,7 @@ static void tb_record(TranslationBlock *tb)
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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assert(paddr0 != -1);
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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@ -745,7 +745,7 @@ static void tb_remove(TranslationBlock *tb)
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
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tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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assert(paddr0 != -1);
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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