cris: Handle opcode zero
It's a valid branch pc + 2. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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@ -262,9 +262,6 @@ static unsigned int dec10_quick_imm(DisasContext *dc)
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break;
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break;
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case CRISV10_QIMM_BCC_R0:
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case CRISV10_QIMM_BCC_R0:
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if (!dc->ir) {
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cpu_abort(dc->env, "opcode zero\n");
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}
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case CRISV10_QIMM_BCC_R1:
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case CRISV10_QIMM_BCC_R1:
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case CRISV10_QIMM_BCC_R2:
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case CRISV10_QIMM_BCC_R2:
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case CRISV10_QIMM_BCC_R3:
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case CRISV10_QIMM_BCC_R3:
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