sii3112: Add explicit type casts to avoid unintended sign extension
Noticed by Coverity Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -79,13 +79,13 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
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val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/
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val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/
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val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0);
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val |= d->i.bmdma[0].status << 16;
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val |= d->i.bmdma[1].status << 24;
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val |= (uint32_t)d->i.bmdma[0].status << 16;
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val |= (uint32_t)d->i.bmdma[1].status << 24;
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break;
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case 0x18:
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val = d->i.bmdma[1].cmd;
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val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0);
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val |= d->i.bmdma[1].status << 16;
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val |= (uint32_t)d->i.bmdma[1].status << 16;
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break;
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case 0x80 ... 0x87:
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if (size == 1) {
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@ -128,7 +128,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
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val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0;
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break;
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case 0x148:
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val = d->regs[0].sien << 16;
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val = (uint32_t)d->regs[0].sien << 16;
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break;
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case 0x180:
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val = d->regs[1].scontrol;
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@ -137,7 +137,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
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val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0;
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break;
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case 0x1c8:
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val = d->regs[1].sien << 16;
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val = (uint32_t)d->regs[1].sien << 16;
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break;
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default:
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val = 0;
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