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sii3112: Add explicit type casts to avoid unintended sign extension

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Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
BALATON Zoltan 2018-01-18 19:18:59 +01:00 committed by David Gibson
parent cf4969ec35
commit 3a14ba4664
1 changed files with 5 additions and 5 deletions
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10
hw/ide/sii3112.c
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@ -79,13 +79,13 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/ val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/
val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/ val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/
val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0); val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0);
val |= d->i.bmdma[0].status << 16; val |= (uint32_t)d->i.bmdma[0].status << 16;
val |= d->i.bmdma[1].status << 24; val |= (uint32_t)d->i.bmdma[1].status << 24;
break; break;
case 0x18: case 0x18:
val = d->i.bmdma[1].cmd; val = d->i.bmdma[1].cmd;
val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0); val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0);
val |= d->i.bmdma[1].status << 16; val |= (uint32_t)d->i.bmdma[1].status << 16;
break; break;
case 0x80 ... 0x87: case 0x80 ... 0x87:
if (size == 1) { if (size == 1) {
@ -128,7 +128,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0; val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0;
break; break;
case 0x148: case 0x148:
val = d->regs[0].sien << 16; val = (uint32_t)d->regs[0].sien << 16;
break; break;
case 0x180: case 0x180:
val = d->regs[1].scontrol; val = d->regs[1].scontrol;
@ -137,7 +137,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0; val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0;
break; break;
case 0x1c8: case 0x1c8:
val = d->regs[1].sien << 16; val = (uint32_t)d->regs[1].sien << 16;
break; break;
default: default:
val = 0; val = 0;