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target/arm: Use tcg_constant in simd shift expanders

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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-04-26 09:30:14 -07:00 committed by Peter Maydell
parent e45b201348
commit 39228a1787
1 changed files with 5 additions and 16 deletions
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21
target/arm/translate-a64.c
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@ -8354,7 +8354,7 @@ static void handle_shri_with_rndacc(TCGv_i64 tcg_res, TCGv_i64 tcg_src,
/* Deal with the rounding step */
if (round) {
if (extended_result) {
TCGv_i64 tcg_zero = tcg_const_i64(0);
TCGv_i64 tcg_zero = tcg_constant_i64(0);
if (!is_u) {
/* take care of sign extending tcg_res */
tcg_gen_sari_i64(tcg_src_hi, tcg_src, 63);
@ -8366,7 +8366,6 @@ static void handle_shri_with_rndacc(TCGv_i64 tcg_res, TCGv_i64 tcg_src,
tcg_src, tcg_zero,
tcg_rnd, tcg_zero);
}
tcg_temp_free_i64(tcg_zero);
} else {
tcg_gen_add_i64(tcg_src, tcg_src, tcg_rnd);
}
@ -8452,8 +8451,7 @@ static void handle_scalar_simd_shri(DisasContext *s,
}
if (round) {
uint64_t round_const = 1ULL << (shift - 1);
tcg_round = tcg_const_i64(round_const);
tcg_round = tcg_constant_i64(1ULL << (shift - 1));
} else {
tcg_round = NULL;
}
@ -8479,9 +8477,6 @@ static void handle_scalar_simd_shri(DisasContext *s,
tcg_temp_free_i64(tcg_rn);
tcg_temp_free_i64(tcg_rd);
if (round) {
tcg_temp_free_i64(tcg_round);
}
}
/* SHL/SLI - Scalar shift left */
@ -8579,8 +8574,7 @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool is_scalar, bool is_q,
tcg_final = tcg_const_i64(0);
if (round) {
uint64_t round_const = 1ULL << (shift - 1);
tcg_round = tcg_const_i64(round_const);
tcg_round = tcg_constant_i64(1ULL << (shift - 1));
} else {
tcg_round = NULL;
}
@ -8600,9 +8594,6 @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool is_scalar, bool is_q,
write_vec_element(s, tcg_final, rd, 1, MO_64);
}
if (round) {
tcg_temp_free_i64(tcg_round);
}
tcg_temp_free_i64(tcg_rn);
tcg_temp_free_i64(tcg_rd);
tcg_temp_free_i32(tcg_rd_narrowed);
@ -8654,7 +8645,7 @@ static void handle_simd_qshl(DisasContext *s, bool scalar, bool is_q,
}
if (size == 3) {
TCGv_i64 tcg_shift = tcg_const_i64(shift);
TCGv_i64 tcg_shift = tcg_constant_i64(shift);
static NeonGenTwo64OpEnvFn * const fns[2][2] = {
{ gen_helper_neon_qshl_s64, gen_helper_neon_qshlu_s64 },
{ NULL, gen_helper_neon_qshl_u64 },
@ -8671,10 +8662,9 @@ static void handle_simd_qshl(DisasContext *s, bool scalar, bool is_q,
tcg_temp_free_i64(tcg_op);
}
tcg_temp_free_i64(tcg_shift);
clear_vec_high(s, is_q, rd);
} else {
TCGv_i32 tcg_shift = tcg_const_i32(shift);
TCGv_i32 tcg_shift = tcg_constant_i32(shift);
static NeonGenTwoOpEnvFn * const fns[2][2][3] = {
{
{ gen_helper_neon_qshl_s8,
@ -8719,7 +8709,6 @@ static void handle_simd_qshl(DisasContext *s, bool scalar, bool is_q,
tcg_temp_free_i32(tcg_op);
}
tcg_temp_free_i32(tcg_shift);
if (!scalar) {
clear_vec_high(s, is_q, rd);