hw/nvme: reimplement flush to allow cancellation
Prior to this patch, a broadcast flush would result in submitting multiple "fire and forget" aios (no reference saved to the aiocbs returned from the blk_aio_flush calls). Fix this by issuing the flushes one after another. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
This commit is contained in:
parent
3276dde4f2
commit
38f4ac65ac
206
hw/nvme/ctrl.c
206
hw/nvme/ctrl.c
@ -1788,22 +1788,19 @@ static inline bool nvme_is_write(NvmeRequest *req)
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rw->opcode == NVME_CMD_WRITE_ZEROES;
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}
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static AioContext *nvme_get_aio_context(BlockAIOCB *acb)
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{
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return qemu_get_aio_context();
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}
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static void nvme_misc_cb(void *opaque, int ret)
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{
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NvmeRequest *req = opaque;
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NvmeNamespace *ns = req->ns;
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BlockBackend *blk = ns->blkconf.blk;
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BlockAcctCookie *acct = &req->acct;
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BlockAcctStats *stats = blk_get_stats(blk);
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trace_pci_nvme_misc_cb(nvme_cid(req), blk_name(blk));
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trace_pci_nvme_misc_cb(nvme_cid(req));
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if (ret) {
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block_acct_failed(stats, acct);
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nvme_aio_err(req, ret);
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} else {
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block_acct_done(stats, acct);
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}
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nvme_enqueue_req_completion(nvme_cq(req), req);
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@ -1919,41 +1916,6 @@ static void nvme_aio_format_cb(void *opaque, int ret)
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nvme_enqueue_req_completion(nvme_cq(req), req);
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}
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struct nvme_aio_flush_ctx {
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NvmeRequest *req;
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NvmeNamespace *ns;
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BlockAcctCookie acct;
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};
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static void nvme_aio_flush_cb(void *opaque, int ret)
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{
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struct nvme_aio_flush_ctx *ctx = opaque;
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NvmeRequest *req = ctx->req;
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uintptr_t *num_flushes = (uintptr_t *)&req->opaque;
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BlockBackend *blk = ctx->ns->blkconf.blk;
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BlockAcctCookie *acct = &ctx->acct;
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BlockAcctStats *stats = blk_get_stats(blk);
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trace_pci_nvme_aio_flush_cb(nvme_cid(req), blk_name(blk));
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if (!ret) {
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block_acct_done(stats, acct);
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} else {
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block_acct_failed(stats, acct);
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nvme_aio_err(req, ret);
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}
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(*num_flushes)--;
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g_free(ctx);
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if (*num_flushes) {
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return;
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}
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nvme_enqueue_req_completion(nvme_cq(req), req);
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}
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static void nvme_verify_cb(void *opaque, int ret)
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{
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NvmeBounceContext *ctx = opaque;
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@ -2868,56 +2830,138 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeRequest *req)
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return NVME_NO_COMPLETE;
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}
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typedef struct NvmeFlushAIOCB {
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BlockAIOCB common;
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BlockAIOCB *aiocb;
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NvmeRequest *req;
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QEMUBH *bh;
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int ret;
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NvmeNamespace *ns;
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uint32_t nsid;
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bool broadcast;
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} NvmeFlushAIOCB;
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static void nvme_flush_cancel(BlockAIOCB *acb)
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{
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NvmeFlushAIOCB *iocb = container_of(acb, NvmeFlushAIOCB, common);
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iocb->ret = -ECANCELED;
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if (iocb->aiocb) {
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blk_aio_cancel_async(iocb->aiocb);
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}
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}
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static const AIOCBInfo nvme_flush_aiocb_info = {
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.aiocb_size = sizeof(NvmeFlushAIOCB),
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.cancel_async = nvme_flush_cancel,
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.get_aio_context = nvme_get_aio_context,
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};
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static void nvme_flush_ns_cb(void *opaque, int ret)
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{
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NvmeFlushAIOCB *iocb = opaque;
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NvmeNamespace *ns = iocb->ns;
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if (ret < 0) {
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iocb->ret = ret;
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goto out;
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} else if (iocb->ret < 0) {
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goto out;
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}
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if (ns) {
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trace_pci_nvme_flush_ns(iocb->nsid);
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iocb->ns = NULL;
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iocb->aiocb = blk_aio_flush(ns->blkconf.blk, nvme_flush_ns_cb, iocb);
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return;
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}
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out:
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iocb->aiocb = NULL;
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qemu_bh_schedule(iocb->bh);
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}
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static void nvme_flush_bh(void *opaque)
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{
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NvmeFlushAIOCB *iocb = opaque;
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NvmeRequest *req = iocb->req;
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NvmeCtrl *n = nvme_ctrl(req);
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int i;
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if (iocb->ret < 0) {
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goto done;
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}
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if (iocb->broadcast) {
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for (i = iocb->nsid + 1; i <= NVME_MAX_NAMESPACES; i++) {
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iocb->ns = nvme_ns(n, i);
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if (iocb->ns) {
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iocb->nsid = i;
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break;
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}
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}
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}
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if (!iocb->ns) {
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goto done;
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}
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nvme_flush_ns_cb(iocb, 0);
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return;
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done:
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qemu_bh_delete(iocb->bh);
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iocb->bh = NULL;
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iocb->common.cb(iocb->common.opaque, iocb->ret);
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qemu_aio_unref(iocb);
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return;
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}
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static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest *req)
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{
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NvmeFlushAIOCB *iocb;
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uint32_t nsid = le32_to_cpu(req->cmd.nsid);
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uintptr_t *num_flushes = (uintptr_t *)&req->opaque;
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uint16_t status;
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struct nvme_aio_flush_ctx *ctx;
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NvmeNamespace *ns;
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trace_pci_nvme_flush(nvme_cid(req), nsid);
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iocb = qemu_aio_get(&nvme_flush_aiocb_info, NULL, nvme_misc_cb, req);
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if (nsid != NVME_NSID_BROADCAST) {
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req->ns = nvme_ns(n, nsid);
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if (unlikely(!req->ns)) {
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return NVME_INVALID_FIELD | NVME_DNR;
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iocb->req = req;
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iocb->bh = qemu_bh_new(nvme_flush_bh, iocb);
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iocb->ret = 0;
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iocb->ns = NULL;
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iocb->nsid = 0;
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iocb->broadcast = (nsid == NVME_NSID_BROADCAST);
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if (!iocb->broadcast) {
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if (!nvme_nsid_valid(n, nsid)) {
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status = NVME_INVALID_NSID | NVME_DNR;
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goto out;
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}
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block_acct_start(blk_get_stats(req->ns->blkconf.blk), &req->acct, 0,
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BLOCK_ACCT_FLUSH);
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req->aiocb = blk_aio_flush(req->ns->blkconf.blk, nvme_misc_cb, req);
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return NVME_NO_COMPLETE;
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}
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/* 1-initialize; see comment in nvme_dsm */
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*num_flushes = 1;
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for (int i = 1; i <= NVME_MAX_NAMESPACES; i++) {
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ns = nvme_ns(n, i);
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if (!ns) {
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continue;
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iocb->ns = nvme_ns(n, nsid);
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if (!iocb->ns) {
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status = NVME_INVALID_FIELD | NVME_DNR;
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goto out;
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}
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ctx = g_new(struct nvme_aio_flush_ctx, 1);
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ctx->req = req;
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ctx->ns = ns;
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(*num_flushes)++;
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block_acct_start(blk_get_stats(ns->blkconf.blk), &ctx->acct, 0,
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BLOCK_ACCT_FLUSH);
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blk_aio_flush(ns->blkconf.blk, nvme_aio_flush_cb, ctx);
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iocb->nsid = nsid;
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}
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/* account for the 1-initialization */
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(*num_flushes)--;
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req->aiocb = &iocb->common;
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qemu_bh_schedule(iocb->bh);
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if (*num_flushes) {
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status = NVME_NO_COMPLETE;
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} else {
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status = req->status;
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}
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return NVME_NO_COMPLETE;
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out:
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qemu_bh_delete(iocb->bh);
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iocb->bh = NULL;
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qemu_aio_unref(iocb);
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return status;
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}
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@ -28,6 +28,8 @@
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#define NVME_MAX_NAMESPACES 256
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#define NVME_EUI64_DEFAULT ((uint64_t)0x5254000000000000)
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QEMU_BUILD_BUG_ON(NVME_MAX_NAMESPACES > NVME_NSID_BROADCAST - 1);
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typedef struct NvmeCtrl NvmeCtrl;
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typedef struct NvmeNamespace NvmeNamespace;
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@ -7,16 +7,16 @@ pci_nvme_map_addr(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64""
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pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64""
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pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) "trans_len %"PRIu64" len %"PRIu32" prp1 0x%"PRIx64" prp2 0x%"PRIx64" num_prps %d"
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pci_nvme_map_sgl(uint8_t typ, uint64_t len) "type 0x%"PRIx8" len %"PRIu64""
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pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" nsid %"PRIu32" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" nsid 0x%"PRIx32" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_flush(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu32""
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pci_nvme_flush_ns(uint32_t nsid) "nsid 0x%"PRIx32""
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pci_nvme_format(uint16_t cid, uint32_t nsid, uint8_t lbaf, uint8_t mset, uint8_t pi, uint8_t pil) "cid %"PRIu16" nsid %"PRIu32" lbaf %"PRIu8" mset %"PRIu8" pi %"PRIu8" pil %"PRIu8""
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pci_nvme_format_ns(uint16_t cid, uint32_t nsid, uint8_t lbaf, uint8_t mset, uint8_t pi, uint8_t pil) "cid %"PRIu16" nsid %"PRIu32" lbaf %"PRIu8" mset %"PRIu8" pi %"PRIu8" pil %"PRIu8""
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pci_nvme_format_cb(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu32""
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pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
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pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
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pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
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pci_nvme_misc_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
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pci_nvme_misc_cb(uint16_t cid) "cid %"PRIu16""
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pci_nvme_dif_rw(uint8_t pract, uint8_t prinfo) "pract 0x%"PRIx8" prinfo 0x%"PRIx8""
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pci_nvme_dif_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
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pci_nvme_dif_rw_mdata_in_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
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