target-arm: Implement checking of fired watchpoint
ARM stops before access to a location covered by watchpoint. Also, QEMU watchpoint fire is not necessarily an architectural watchpoint match. Unfortunately, that is hardly possible to ignore a fired watchpoint in debug exception handler. So move watchpoint check from debug exception handler to the dedicated watchpoint checking callback. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1454256948-10485-3-git-send-email-serge.fdrv@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1483,6 +1483,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_arch_name = arm_gdb_arch_name;
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cc->gdb_stop_before_watchpoint = true;
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cc->debug_excp_handler = arm_debug_excp_handler;
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cc->debug_check_watchpoint = arm_debug_check_watchpoint;
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cc->disas_set_info = arm_disas_set_info;
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@ -409,6 +409,9 @@ void hw_breakpoint_update(ARMCPU *cpu, int n);
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*/
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void hw_breakpoint_update_all(ARMCPU *cpu);
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/* Callback function for checking if a watchpoint should trigger. */
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bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp);
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/* Callback function for when a watchpoint or breakpoint triggers. */
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void arm_debug_excp_handler(CPUState *cs);
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@ -976,6 +976,16 @@ void HELPER(check_breakpoints)(CPUARMState *env)
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}
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}
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bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp)
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{
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/* Called by core code when a CPU watchpoint fires; need to check if this
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* is also an architectural watchpoint match.
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*/
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ARMCPU *cpu = ARM_CPU(cs);
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return check_watchpoints(cpu);
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}
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void arm_debug_excp_handler(CPUState *cs)
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{
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/* Called by core code when a watchpoint or breakpoint fires;
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@ -987,11 +997,11 @@ void arm_debug_excp_handler(CPUState *cs)
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if (wp_hit) {
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if (wp_hit->flags & BP_CPU) {
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cs->watchpoint_hit = NULL;
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if (check_watchpoints(cpu)) {
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bool wnr = (wp_hit->flags & BP_WATCHPOINT_HIT_WRITE) != 0;
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bool same_el = arm_debug_target_el(env) == arm_current_el(env);
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cs->watchpoint_hit = NULL;
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if (extended_addresses_enabled(env)) {
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env->exception.fsr = (1 << 9) | 0x22;
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} else {
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@ -1001,9 +1011,6 @@ void arm_debug_excp_handler(CPUState *cs)
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raise_exception(env, EXCP_DATA_ABORT,
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syn_watchpoint(same_el, 0, wnr),
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arm_debug_target_el(env));
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} else {
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cpu_resume_from_signal(cs, NULL);
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}
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}
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} else {
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uint64_t pc = is_a64(env) ? env->pc : env->regs[15];
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