hw/i2c: support multiple masters
Allow slaves to master the bus by registering a bottom halve. If the bus is busy, the bottom half is queued up. When a slave has succesfully mastered the bus, the bottom half is scheduled. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> [ clg : - fixed typos in commit log ] Message-Id: <20220601210831.67259-4-its@irrelevant.dk> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220630045133.32251-5-me@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -13,6 +13,7 @@
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#include "migration/vmstate.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "qemu/main-loop.h"
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#include "trace.h"
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#define I2C_BROADCAST 0x00
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@ -62,6 +63,7 @@ I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
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bus = I2C_BUS(qbus_new(TYPE_I2C_BUS, parent, name));
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QLIST_INIT(&bus->current_devs);
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QSIMPLEQ_INIT(&bus->pending_masters);
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vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_i2c_bus, bus);
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return bus;
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}
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@ -74,7 +76,7 @@ void i2c_slave_set_address(I2CSlave *dev, uint8_t address)
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/* Return nonzero if bus is busy. */
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int i2c_bus_busy(I2CBus *bus)
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{
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return !QLIST_EMPTY(&bus->current_devs);
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return !QLIST_EMPTY(&bus->current_devs) || bus->bh;
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}
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bool i2c_scan_bus(I2CBus *bus, uint8_t address, bool broadcast,
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@ -180,6 +182,26 @@ int i2c_start_transfer(I2CBus *bus, uint8_t address, bool is_recv)
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: I2C_START_SEND);
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}
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void i2c_bus_master(I2CBus *bus, QEMUBH *bh)
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{
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if (i2c_bus_busy(bus)) {
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I2CPendingMaster *node = g_new(struct I2CPendingMaster, 1);
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node->bh = bh;
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QSIMPLEQ_INSERT_TAIL(&bus->pending_masters, node, entry);
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return;
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}
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bus->bh = bh;
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qemu_bh_schedule(bus->bh);
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}
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void i2c_bus_release(I2CBus *bus)
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{
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bus->bh = NULL;
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}
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int i2c_start_recv(I2CBus *bus, uint8_t address)
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{
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return i2c_do_start_transfer(bus, address, I2C_START_RECV);
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@ -206,6 +228,16 @@ void i2c_end_transfer(I2CBus *bus)
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g_free(node);
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}
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bus->broadcast = false;
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if (!QSIMPLEQ_EMPTY(&bus->pending_masters)) {
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I2CPendingMaster *node = QSIMPLEQ_FIRST(&bus->pending_masters);
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bus->bh = node->bh;
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QSIMPLEQ_REMOVE_HEAD(&bus->pending_masters, entry);
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g_free(node);
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qemu_bh_schedule(bus->bh);
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}
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}
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int i2c_send(I2CBus *bus, uint8_t data)
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@ -69,13 +69,25 @@ struct I2CNode {
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QLIST_ENTRY(I2CNode) next;
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};
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typedef struct I2CPendingMaster I2CPendingMaster;
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struct I2CPendingMaster {
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QEMUBH *bh;
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QSIMPLEQ_ENTRY(I2CPendingMaster) entry;
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};
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typedef QLIST_HEAD(I2CNodeList, I2CNode) I2CNodeList;
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typedef QSIMPLEQ_HEAD(I2CPendingMasters, I2CPendingMaster) I2CPendingMasters;
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struct I2CBus {
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BusState qbus;
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I2CNodeList current_devs;
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I2CPendingMasters pending_masters;
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uint8_t saved_address;
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bool broadcast;
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/* Set from slave currently mastering the bus. */
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QEMUBH *bh;
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};
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I2CBus *i2c_init_bus(DeviceState *parent, const char *name);
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@ -117,6 +129,8 @@ int i2c_start_send(I2CBus *bus, uint8_t address);
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void i2c_end_transfer(I2CBus *bus);
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void i2c_nack(I2CBus *bus);
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void i2c_bus_master(I2CBus *bus, QEMUBH *bh);
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void i2c_bus_release(I2CBus *bus);
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int i2c_send(I2CBus *bus, uint8_t data);
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uint8_t i2c_recv(I2CBus *bus);
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bool i2c_scan_bus(I2CBus *bus, uint8_t address, bool broadcast,
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