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qtest/ahci: Demagic ahci tests.

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Add human-readable command names and other miscellaneous #defines
to help make the code more readable.

Some of these definitions are not yet used in this current series,
but for convenience and sanity they have been lumped together here,
as it's more trouble than it is worth in a test suite to hand-pick,
one-by-one, which preprocessor definitions are useful per-each test.

These definitions include:

ATA Command Mnemonics
Current expected AHCI sector size
FIS magic bytes
REG_H2D_FIS flags
Command Header flags

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Message-id: 1423158090-25580-10-git-send-email-jsnow@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
John Snow 2015-02-05 12:41:20 -05:00 committed by Stefan Hajnoczi
parent d1ef883894
commit 36e367261c
2 changed files with 59 additions and 6 deletions
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8
tests/ahci-test.c
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@ -706,7 +706,7 @@ static void ahci_test_identify(AHCIQState *ahci)
/* Construct our Command Header (set_command_header handles endianness.) */
memset(&cmd, 0x00, sizeof(cmd));
cmd.flags = 5; /* reg_h2d_fis is 5 double-words long */
cmd.flags |= 0x400; /* clear PxTFD.STS.BSY when done */
cmd.flags |= CMDH_CLR_BSY; /* clear PxTFD.STS.BSY when done */
cmd.prdtl = 1; /* One PRD table entry. */
cmd.prdbc = 0;
cmd.ctba = table;
@ -719,10 +719,10 @@ static void ahci_test_identify(AHCIQState *ahci)
/* Construct our Command FIS, Based on http://wiki.osdev.org/AHCI */
memset(&fis, 0x00, sizeof(fis));
fis.fis_type = 0x27; /* Register Host-to-Device FIS */
fis.command = 0xEC; /* IDENTIFY */
fis.fis_type = REG_H2D_FIS; /* Register Host-to-Device FIS */
fis.command = CMD_IDENTIFY;
fis.device = 0;
fis.flags = 0x80; /* Indicate this is a command FIS */
fis.flags = REG_H2D_FIS_CMD; /* Indicate this is a command FIS */
/* We've committed nothing yet, no interrupts should be posted yet. */
g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);

53
tests/libqos/ahci.h
View File

@ -243,6 +243,59 @@
#define AHCI_VERSION_1_2 (0x00010200)
#define AHCI_VERSION_1_3 (0x00010300)
#define AHCI_SECTOR_SIZE (512)
/* FIS types */
enum {
REG_H2D_FIS = 0x27,
REG_D2H_FIS = 0x34,
DMA_ACTIVATE_FIS = 0x39,
DMA_SETUP_FIS = 0x41,
DATA_FIS = 0x46,
BIST_ACTIVATE_FIS = 0x58,
PIO_SETUP_FIS = 0x5F,
SDB_FIS = 0xA1
};
/* FIS flags */
#define REG_H2D_FIS_CMD 0x80
/* ATA Commands */
enum {
/* DMA */
CMD_READ_DMA = 0xC8,
CMD_READ_DMA_EXT = 0x25,
CMD_WRITE_DMA = 0xCA,
CMD_WRITE_DMA_EXT = 0x35,
/* PIO */
CMD_READ_PIO = 0x20,
CMD_READ_PIO_EXT = 0x24,
CMD_WRITE_PIO = 0x30,
CMD_WRITE_PIO_EXT = 0x34,
/* Misc */
CMD_READ_MAX = 0xF8,
CMD_READ_MAX_EXT = 0x27,
CMD_FLUSH_CACHE = 0xE7,
CMD_IDENTIFY = 0xEC
};
/* AHCI Command Header Flags & Masks*/
#define CMDH_CFL (0x1F)
#define CMDH_ATAPI (0x20)
#define CMDH_WRITE (0x40)
#define CMDH_PREFETCH (0x80)
#define CMDH_RESET (0x100)
#define CMDH_BIST (0x200)
#define CMDH_CLR_BSY (0x400)
#define CMDH_RES (0x800)
#define CMDH_PMP (0xF000)
/* ATA device register masks */
#define ATA_DEVICE_MAGIC 0xA0
#define ATA_DEVICE_LBA 0x40
#define ATA_DEVICE_DRIVE 0x10
#define ATA_DEVICE_HEAD 0x0F
/*** Structures ***/
typedef struct AHCIPortQState {