net: tulip: Restrict DMA engine to memories
The DMA engine is started by I/O access and then itself accesses the I/O registers, triggering a reentrancy bug. The following log can reveal it: ==5637==ERROR: AddressSanitizer: stack-overflow #0 0x5595435f6078 in tulip_xmit_list_update qemu/hw/net/tulip.c:673 #1 0x5595435f204a in tulip_write qemu/hw/net/tulip.c:805:13 #2 0x559544637f86 in memory_region_write_accessor qemu/softmmu/memory.c:492:5 #3 0x5595446379fa in access_with_adjusted_size qemu/softmmu/memory.c:554:18 #4 0x5595446372fa in memory_region_dispatch_write qemu/softmmu/memory.c #5 0x55954468b74c in flatview_write_continue qemu/softmmu/physmem.c:2825:23 #6 0x559544683662 in flatview_write qemu/softmmu/physmem.c:2867:12 #7 0x5595446833f3 in address_space_write qemu/softmmu/physmem.c:2963:18 #8 0x5595435fb082 in dma_memory_rw_relaxed qemu/include/sysemu/dma.h:87:12 #9 0x5595435fb082 in dma_memory_rw qemu/include/sysemu/dma.h:130:12 #10 0x5595435fb082 in dma_memory_write qemu/include/sysemu/dma.h:171:12 #11 0x5595435fb082 in stl_le_dma qemu/include/sysemu/dma.h:272:1 #12 0x5595435fb082 in stl_le_pci_dma qemu/include/hw/pci/pci.h:910:1 #13 0x5595435fb082 in tulip_desc_write qemu/hw/net/tulip.c:101:9 #14 0x5595435f7e3d in tulip_xmit_list_update qemu/hw/net/tulip.c:706:9 #15 0x5595435f204a in tulip_write qemu/hw/net/tulip.c:805:13 Fix this bug by restricting the DMA engine to memories regions. Signed-off-by: Zheyu Ma <zheyuma97@gmail.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
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@ -70,7 +70,7 @@ static const VMStateDescription vmstate_pci_tulip = {
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static void tulip_desc_read(TULIPState *s, hwaddr p,
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struct tulip_descriptor *desc)
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{
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const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
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const MemTxAttrs attrs = { .memory = true };
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if (s->csr[0] & CSR0_DBO) {
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ldl_be_pci_dma(&s->dev, p, &desc->status, attrs);
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@ -88,7 +88,7 @@ static void tulip_desc_read(TULIPState *s, hwaddr p,
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static void tulip_desc_write(TULIPState *s, hwaddr p,
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struct tulip_descriptor *desc)
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{
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const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
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const MemTxAttrs attrs = { .memory = true };
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if (s->csr[0] & CSR0_DBO) {
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stl_be_pci_dma(&s->dev, p, desc->status, attrs);
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