Pull request trivial-branch 20210515

-----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmCfnFMSHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L74817EQAKnobLPk1uRD9TghCVw6oaaQ0CoIYP4h
 H2J+r+zEMR4jQs43j8NP5H70/DCclQoDeTYz0ukU1yh8qj4REB0icEZbt7oB2Sjj
 rJFarzQ8SnCvmPHJRdH/jaSgeUYdTJIFZbK0/bchI9FO80XhzTEwm4zDKp8LJys+
 vb9LXZ8NDCGZT20Fn1V/m0+YNFHqW0IPHZMHy0f/Qstr7/ciL2P8gb3r4tCiMpji
 whVuvA9x3o2tA8Lnibco7IoVllJ5JLvqUOruMp+eOFn0b/eUnMuO3lOALFYQxg/A
 FCrmi8kIcCWrRkAIQvUnfUWveG3LCRnd2Wk7JK5uGPawC4VKvjjjtt6ZWIBHDBjC
 qtFYSZLvP+r7o/WR9WaB5XAMVVinTZ1Ra7RRFub8JsyflNCAnumdn4gM21ztG8g9
 p1GEvOWspM6Q3gfZFtQRhDvAVxW7++6dewTfuZE09eyXxL2be3pNStNCzPGFG8ww
 p7nFrasMN1mr3H97sqBh4alu+yAwtyVbvstGcA33KQzxATAmGz9O57qDcQPJLgaF
 WfxU4+K2xiFQoiJEGcQ4NlHTEQQBgxATvY8o5mBs+Kar6Y/6AarcYA7HDAJlyG9E
 JIvwEqvhz8qNlQ5+A6cNBYwSJD4cP4nv2fopKduY53t3Ngw03nJ1CKey2y/knTBS
 KibeapH4GNmJ
 =Qu5j
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging

Pull request trivial-branch 20210515

# gpg: Signature made Sat 15 May 2021 11:02:59 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-6.1-pull-request:
  target/avr: Ignore unimplemented WDR opcode
  hw/avr/atmega.c: use the avr51 cpu for atmega1280
  target/sh4: Return error if CPUClass::get_phys_page_debug() fails
  multi-process: Avoid logical AND of mutually exclusive tests
  hw/pci-host: Do not build gpex-acpi.c if GPEX is not selected
  hw/mem/meson: Fix linking sparse-mem device with fuzzer
  cutils: fix memory leak in get_relocated_path()
  hw/rtc/mc146818rtc: Convert to 3-phase reset (Resettable interface)
  hw/timer/etraxfs_timer: Convert to 3-phase reset (Resettable interface)
  hw/gpio/aspeed: spelling fix (addtional)
  qapi: spelling fix (addtional)
  virtiofsd: Fix check of chown()'s return value
  virtio-net: Constify VirtIOFeature feature_sizes[]
  virtio-blk: Constify VirtIOFeature feature_sizes[]
  hw/virtio: Pass virtio_feature_get_config_size() a const argument
  backends/tpm: Replace qemu_mutex_lock calls with QEMU_LOCK_GUARD

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-05-17 16:44:47 +01:00
commit 367196caa0
13 changed files with 65 additions and 59 deletions

View File

@ -30,6 +30,7 @@
#include "qemu/error-report.h"
#include "qemu/module.h"
#include "qemu/sockets.h"
#include "qemu/lockable.h"
#include "io/channel-socket.h"
#include "sysemu/tpm_backend.h"
#include "sysemu/tpm_util.h"
@ -124,31 +125,26 @@ static int tpm_emulator_ctrlcmd(TPMEmulator *tpm, unsigned long cmd, void *msg,
uint32_t cmd_no = cpu_to_be32(cmd);
ssize_t n = sizeof(uint32_t) + msg_len_in;
uint8_t *buf = NULL;
int ret = -1;
qemu_mutex_lock(&tpm->mutex);
WITH_QEMU_LOCK_GUARD(&tpm->mutex) {
buf = g_alloca(n);
memcpy(buf, &cmd_no, sizeof(cmd_no));
memcpy(buf + sizeof(cmd_no), msg, msg_len_in);
buf = g_alloca(n);
memcpy(buf, &cmd_no, sizeof(cmd_no));
memcpy(buf + sizeof(cmd_no), msg, msg_len_in);
n = qemu_chr_fe_write_all(dev, buf, n);
if (n <= 0) {
goto end;
}
if (msg_len_out != 0) {
n = qemu_chr_fe_read_all(dev, msg, msg_len_out);
n = qemu_chr_fe_write_all(dev, buf, n);
if (n <= 0) {
goto end;
return -1;
}
if (msg_len_out != 0) {
n = qemu_chr_fe_read_all(dev, msg, msg_len_out);
if (n <= 0) {
return -1;
}
}
}
ret = 0;
end:
qemu_mutex_unlock(&tpm->mutex);
return ret;
return 0;
}
static int tpm_emulator_unix_tx_bufs(TPMEmulator *tpm_emu,

View File

@ -401,7 +401,7 @@ static void atmega1280_class_init(ObjectClass *oc, void *data)
{
AtmegaMcuClass *amc = ATMEGA_MCU_CLASS(oc);
amc->cpu_type = AVR_CPU_TYPE_NAME("avr6");
amc->cpu_type = AVR_CPU_TYPE_NAME("avr51");
amc->flash_size = 128 * KiB;
amc->eeprom_size = 4 * KiB;
amc->sram_size = 8 * KiB;

View File

@ -170,7 +170,7 @@
/* AST2600 only - 1.8V gpios */
/*
* The AST2600 has same 3.6V gpios as the AST2400 (memory offsets 0x0-0x198)
* and addtional 1.8V gpios (memory offsets 0x800-0x9D4).
* and additional 1.8V gpios (memory offsets 0x800-0x9D4).
*/
#define GPIO_1_8V_REG_OFFSET 0x800
#define GPIO_1_8V_ABCD_DATA_VALUE ((0x800 - GPIO_1_8V_REG_OFFSET) >> 2)

View File

@ -1,8 +1,9 @@
mem_ss = ss.source_set()
mem_ss.add(files('memory-device.c'))
mem_ss.add(when: 'CONFIG_FUZZ', if_true: files('sparse-mem.c'))
mem_ss.add(when: 'CONFIG_DIMM', if_true: files('pc-dimm.c'))
mem_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_mc.c'))
mem_ss.add(when: 'CONFIG_NVDIMM', if_true: files('nvdimm.c'))
softmmu_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)
softmmu_ss.add(when: 'CONFIG_FUZZ', if_true: files('sparse-mem.c'))

View File

@ -3,7 +3,7 @@ pci_ss.add(when: 'CONFIG_PAM', if_true: files('pam.c'))
pci_ss.add(when: 'CONFIG_PCI_BONITO', if_true: files('bonito.c'))
pci_ss.add(when: 'CONFIG_PCI_EXPRESS_DESIGNWARE', if_true: files('designware.c'))
pci_ss.add(when: 'CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', if_true: files('gpex.c'))
pci_ss.add(when: 'CONFIG_ACPI', if_true: files('gpex-acpi.c'))
pci_ss.add(when: ['CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', 'CONFIG_ACPI'], if_true: files('gpex-acpi.c'))
pci_ss.add(when: 'CONFIG_PCI_EXPRESS_Q35', if_true: files('q35.c'))
pci_ss.add(when: 'CONFIG_PCI_EXPRESS_XILINX', if_true: files('xilinx-pcie.c'))
pci_ss.add(when: 'CONFIG_PCI_I440FX', if_true: files('i440fx.c'))

View File

@ -218,7 +218,7 @@ uint64_t mpqemu_msg_send_and_await_reply(MPQemuMsg *msg, PCIProxyDev *pdev,
bool mpqemu_msg_valid(MPQemuMsg *msg)
{
if (msg->cmd >= MPQEMU_CMD_MAX && msg->cmd < 0) {
if (msg->cmd >= MPQEMU_CMD_MAX || msg->cmd < 0) {
return false;
}

View File

@ -871,22 +871,6 @@ static void rtc_notify_suspend(Notifier *notifier, void *data)
rtc_set_memory(ISA_DEVICE(s), 0xF, 0xFE);
}
static void rtc_reset(void *opaque)
{
RTCState *s = opaque;
s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
check_update_timer(s);
qemu_irq_lower(s->irq);
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
s->irq_coalesced = 0;
s->irq_reinject_on_ack_count = 0;
}
}
static const MemoryRegionOps cmos_ops = {
.read = cmos_ioport_read,
.write = cmos_ioport_write,
@ -961,7 +945,6 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
memory_region_add_coalescing(&s->coalesced_io, 0, 1);
qdev_set_legacy_instance_id(dev, RTC_ISA_BASE, 3);
qemu_register_reset(rtc_reset, s);
object_property_add_tm(OBJECT(s), "date", rtc_get_date);
@ -997,15 +980,32 @@ static Property mc146818rtc_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static void rtc_resetdev(DeviceState *d)
static void rtc_reset_enter(Object *obj, ResetType type)
{
RTCState *s = MC146818_RTC(d);
RTCState *s = MC146818_RTC(obj);
/* Reason: VM do suspend self will set 0xfe
* Reset any values other than 0xfe(Guest suspend case) */
if (s->cmos_data[0x0f] != 0xfe) {
s->cmos_data[0x0f] = 0x00;
}
s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
check_update_timer(s);
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
s->irq_coalesced = 0;
s->irq_reinject_on_ack_count = 0;
}
}
static void rtc_reset_hold(Object *obj)
{
RTCState *s = MC146818_RTC(obj);
qemu_irq_lower(s->irq);
}
static void rtc_build_aml(ISADevice *isadev, Aml *scope)
@ -1032,11 +1032,13 @@ static void rtc_build_aml(ISADevice *isadev, Aml *scope)
static void rtc_class_initfn(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
dc->realize = rtc_realizefn;
dc->reset = rtc_resetdev;
dc->vmsd = &vmstate_rtc;
rc->phases.enter = rtc_reset_enter;
rc->phases.hold = rtc_reset_hold;
isa->build_aml = rtc_build_aml;
device_class_set_props(dc, mc146818rtc_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);

View File

@ -309,9 +309,9 @@ static const MemoryRegionOps timer_ops = {
}
};
static void etraxfs_timer_reset(void *opaque)
static void etraxfs_timer_reset_enter(Object *obj, ResetType type)
{
ETRAXTimerState *t = opaque;
ETRAXTimerState *t = ETRAX_TIMER(obj);
ptimer_transaction_begin(t->ptimer_t0);
ptimer_stop(t->ptimer_t0);
@ -325,6 +325,12 @@ static void etraxfs_timer_reset(void *opaque)
t->rw_wd_ctrl = 0;
t->r_intr = 0;
t->rw_intr_mask = 0;
}
static void etraxfs_timer_reset_hold(Object *obj)
{
ETRAXTimerState *t = ETRAX_TIMER(obj);
qemu_irq_lower(t->irq);
}
@ -343,14 +349,16 @@ static void etraxfs_timer_realize(DeviceState *dev, Error **errp)
memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t,
"etraxfs-timer", 0x5c);
sysbus_init_mmio(sbd, &t->mmio);
qemu_register_reset(etraxfs_timer_reset, t);
}
static void etraxfs_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
dc->realize = etraxfs_timer_realize;
rc->phases.enter = etraxfs_timer_reset_enter;
rc->phases.hold = etraxfs_timer_reset_hold;
}
static const TypeInfo etraxfs_timer_info = {

View File

@ -251,8 +251,8 @@
#
# @max_queue_size: the maximum number of packets to keep in the queue for
# comparing with incoming packets from @secondary_in. If the
# queue is full and addtional packets are received, the
# addtional packets are dropped. (default: 1024)
# queue is full and additional packets are received, the
# additional packets are dropped. (default: 1024)
#
# @vnet_hdr_support: if true, vnet header support is enabled (default: false)
#

View File

@ -188,11 +188,7 @@ void helper_break(CPUAVRState *env)
void helper_wdr(CPUAVRState *env)
{
CPUState *cs = env_cpu(env);
/* WD is not implemented yet, placeholder */
cs->exception_index = EXCP_DEBUG;
cpu_loop_exit(cs);
qemu_log_mask(LOG_UNIMP, "WDG reset (not implemented)\n");
}
/*

View File

@ -441,9 +441,12 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
target_ulong physical;
int prot;
get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD);
if (get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD)
== MMU_OK) {
return physical;
}
return physical;
return -1;
}
void cpu_load_tlb(CPUSH4State * env)

View File

@ -1024,9 +1024,9 @@ static int fv_create_listen_socket(struct fuse_session *se)
if (se->vu_socket_group) {
struct group *g = getgrnam(se->vu_socket_group);
if (g) {
if (!chown(se->vu_socket_path, -1, g->gr_gid)) {
if (chown(se->vu_socket_path, -1, g->gr_gid) == -1) {
fuse_log(FUSE_LOG_WARNING,
"vhost socket failed to set group to %s (%d)\n",
"vhost socket failed to set group to %s (%d): %m\n",
se->vu_socket_group, g->gr_gid);
}
}

View File

@ -1055,5 +1055,5 @@ char *get_relocated_path(const char *dir)
assert(G_IS_DIR_SEPARATOR(dir[-1]));
g_string_append(result, dir - 1);
}
return result->str;
return g_string_free(result, false);
}