target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()
In the v7M and v8M ARM ARM, the magic exception return values are referred to as EXC_RETURN values, and in QEMU we use V7M_EXCRET_* constants to define bits within them. Rename the 'type' variable which holds the exception return value in do_v7m_exception_exit() to excret, making it clearer that it does hold an EXC_RETURN value. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505137930-13255-8-git-send-email-peter.maydell@linaro.org
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@ -6212,7 +6212,7 @@ static void v7m_push_stack(ARMCPU *cpu)
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static void do_v7m_exception_exit(ARMCPU *cpu)
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{
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CPUARMState *env = &cpu->env;
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uint32_t type;
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uint32_t excret;
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uint32_t xpsr;
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bool ufault = false;
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bool return_to_sp_process = false;
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@ -6233,18 +6233,19 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
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* the target value up between env->regs[15] and env->thumb in
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* gen_bx(). Reconstitute it.
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*/
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type = env->regs[15];
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excret = env->regs[15];
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if (env->thumb) {
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type |= 1;
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excret |= 1;
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}
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qemu_log_mask(CPU_LOG_INT, "Exception return: magic PC %" PRIx32
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" previous exception %d\n",
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type, env->v7m.exception);
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excret, env->v7m.exception);
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if ((type & R_V7M_EXCRET_RES1_MASK) != R_V7M_EXCRET_RES1_MASK) {
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if ((excret & R_V7M_EXCRET_RES1_MASK) != R_V7M_EXCRET_RES1_MASK) {
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qemu_log_mask(LOG_GUEST_ERROR, "M profile: zero high bits in exception "
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"exit PC value 0x%" PRIx32 " are UNPREDICTABLE\n", type);
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"exit PC value 0x%" PRIx32 " are UNPREDICTABLE\n",
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excret);
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}
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if (env->v7m.exception != ARMV7M_EXCP_NMI) {
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@ -6255,7 +6256,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
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* which security state's faultmask to clear. (v8M ARM ARM R_KBNF.)
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*/
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if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
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int es = type & R_V7M_EXCRET_ES_MASK;
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int es = excret & R_V7M_EXCRET_ES_MASK;
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if (armv7m_nvic_raw_execution_priority(env->nvic) >= 0) {
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env->v7m.faultmask[es] = 0;
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}
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@ -6283,7 +6284,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
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g_assert_not_reached();
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}
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switch (type & 0xf) {
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switch (excret & 0xf) {
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case 1: /* Return to Handler */
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return_to_handler = true;
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break;
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@ -6306,7 +6307,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
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*/
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env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
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armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
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v7m_exception_taken(cpu, type);
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v7m_exception_taken(cpu, excret);
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qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on existing "
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"stackframe: failed exception return integrity check\n");
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return;
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@ -6341,14 +6342,14 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
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/* The restored xPSR exception field will be zero if we're
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* resuming in Thread mode. If that doesn't match what the
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* exception return type specified then this is a UsageFault.
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* exception return excret specified then this is a UsageFault.
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*/
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if (return_to_handler != arm_v7m_is_handler_mode(env)) {
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/* Take an INVPC UsageFault by pushing the stack again. */
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armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
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env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
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v7m_push_stack(cpu);
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v7m_exception_taken(cpu, type);
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v7m_exception_taken(cpu, excret);
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qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on new stackframe: "
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"failed exception return integrity check\n");
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return;
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