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hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type

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Remove usage of TypeInfo::class_data. Instead fill the fields in
the corresponding class_init().

So far all children use the same values for almost all fields,
but we are going to add the BCM2711/BCM2838 SoC for the raspi4
machine which use different fields.

Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201024170127.3592182-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-10-24 19:01:20 +02:00 committed by Peter Maydell
parent 58b350280e
commit 34d1a4f591
1 changed files with 51 additions and 57 deletions
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108
hw/arm/bcm2836.c
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@ -17,57 +17,31 @@
#include "hw/arm/raspi_platform.h"
#include "hw/sysbus.h"
typedef struct BCM283XInfo BCM283XInfo;
typedef struct BCM283XClass {
/*< private >*/
DeviceClass parent_class;
/*< public >*/
const BCM283XInfo *info;
} BCM283XClass;
struct BCM283XInfo {
const char *name;
const char *cpu_type;
hwaddr peri_base; /* Peripheral base address seen by the CPU */
hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
int clusterid;
};
} BCM283XClass;
#define BCM283X_CLASS(klass) \
OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
#define BCM283X_GET_CLASS(obj) \
OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
static const BCM283XInfo bcm283x_socs[] = {
{
.name = TYPE_BCM2836,
.cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
.peri_base = 0x3f000000,
.ctrl_base = 0x40000000,
.clusterid = 0xf,
},
#ifdef TARGET_AARCH64
{
.name = TYPE_BCM2837,
.cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
.peri_base = 0x3f000000,
.ctrl_base = 0x40000000,
.clusterid = 0x0,
},
#endif
};
static void bcm2836_init(Object *obj)
{
BCM283XState *s = BCM283X(obj);
BCM283XClass *bc = BCM283X_GET_CLASS(obj);
const BCM283XInfo *info = bc->info;
int n;
for (n = 0; n < BCM283X_NCPUS; n++) {
object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
info->cpu_type);
bc->cpu_type);
}
object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL);
@ -84,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
{
BCM283XState *s = BCM283X(dev);
BCM283XClass *bc = BCM283X_GET_CLASS(dev);
const BCM283XInfo *info = bc->info;
Object *obj;
int n;
@ -102,14 +75,14 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
"sd-bus");
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
info->peri_base, 1);
bc->peri_base, 1);
/* bcm2836 interrupt controller (and mailboxes, etc.) */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->control), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
@ -118,11 +91,11 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
for (n = 0; n < BCM283X_NCPUS; n++) {
/* TODO: this should be converted to a property of ARM_CPU */
s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
/* set periphbase/CBAR value for CPU-local registers */
if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
info->peri_base, errp)) {
bc->peri_base, errp)) {
return;
}
@ -165,38 +138,59 @@ static Property bcm2836_props[] = {
static void bcm283x_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
BCM283XClass *bc = BCM283X_CLASS(oc);
bc->info = data;
dc->realize = bcm2836_realize;
device_class_set_props(dc, bcm2836_props);
/* Reason: Must be wired up in code (see raspi_init() function) */
dc->user_creatable = false;
}
static const TypeInfo bcm283x_type_info = {
.name = TYPE_BCM283X,
.parent = TYPE_DEVICE,
.instance_size = sizeof(BCM283XState),
.instance_init = bcm2836_init,
.class_size = sizeof(BCM283XClass),
.abstract = true,
static void bcm2836_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
BCM283XClass *bc = BCM283X_CLASS(oc);
bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
bc->peri_base = 0x3f000000;
bc->ctrl_base = 0x40000000;
bc->clusterid = 0xf;
dc->realize = bcm2836_realize;
device_class_set_props(dc, bcm2836_props);
};
static void bcm2836_register_types(void)
#ifdef TARGET_AARCH64
static void bcm2837_class_init(ObjectClass *oc, void *data)
{
int i;
DeviceClass *dc = DEVICE_CLASS(oc);
BCM283XClass *bc = BCM283X_CLASS(oc);
type_register_static(&bcm283x_type_info);
for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
TypeInfo ti = {
.name = bcm283x_socs[i].name,
.parent = TYPE_BCM283X,
.class_init = bcm283x_class_init,
.class_data = (void *) &bcm283x_socs[i],
};
type_register(&ti);
bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
bc->peri_base = 0x3f000000;
bc->ctrl_base = 0x40000000;
bc->clusterid = 0x0;
dc->realize = bcm2836_realize;
device_class_set_props(dc, bcm2836_props);
};
#endif
static const TypeInfo bcm283x_types[] = {
{
.name = TYPE_BCM2836,
.parent = TYPE_BCM283X,
.class_init = bcm2836_class_init,
#ifdef TARGET_AARCH64
}, {
.name = TYPE_BCM2837,
.parent = TYPE_BCM283X,
.class_init = bcm2837_class_init,
#endif
}, {
.name = TYPE_BCM283X,
.parent = TYPE_DEVICE,
.instance_size = sizeof(BCM283XState),
.instance_init = bcm2836_init,
.class_size = sizeof(BCM283XClass),
.class_init = bcm283x_class_init,
.abstract = true,
}
}
};
type_init(bcm2836_register_types)
DEFINE_TYPES(bcm283x_types)