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spapr: Add support for new NMI interface

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This implements an NMI interface POWERPC SPAPR machine.
This enables an "nmi" HMP/QMP command supported on SPAPR.

This calls POWERPC_EXCP_RESET (vector 0x100) in the guest to deliver NMI
to every CPU. The expected result is XMON (in-kernel debugger) invocation.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Alexey Kardashevskiy 2014-08-20 22:16:36 +10:00 committed by Paolo Bonzini
parent 3dd7852f19
commit 3431648272
3 changed files with 30 additions and 0 deletions
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21
hw/ppc/spapr.c
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@ -55,6 +55,7 @@
#include "qemu/config-file.h" #include "qemu/config-file.h"
#include "qemu/error-report.h" #include "qemu/error-report.h"
#include "trace.h" #include "trace.h"
#include "hw/nmi.h"
#include <libfdt.h> #include <libfdt.h>
@ -1576,10 +1577,28 @@ static void spapr_machine_initfn(Object *obj)
spapr_get_kvm_type, spapr_set_kvm_type, NULL); spapr_get_kvm_type, spapr_set_kvm_type, NULL);
} }
static void ppc_cpu_do_nmi_on_cpu(void *arg)
{
CPUState *cs = arg;
cpu_synchronize_state(cs);
ppc_cpu_do_system_reset(cs);
}
static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
{
CPUState *cs;
CPU_FOREACH(cs) {
async_run_on_cpu(cs, ppc_cpu_do_nmi_on_cpu, cs);
}
}
static void spapr_machine_class_init(ObjectClass *oc, void *data) static void spapr_machine_class_init(ObjectClass *oc, void *data)
{ {
MachineClass *mc = MACHINE_CLASS(oc); MachineClass *mc = MACHINE_CLASS(oc);
FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
NMIClass *nc = NMI_CLASS(oc);
mc->name = "pseries"; mc->name = "pseries";
mc->desc = "pSeries Logical Partition (PAPR compliant)"; mc->desc = "pSeries Logical Partition (PAPR compliant)";
@ -1593,6 +1612,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
mc->kvm_type = spapr_kvm_type; mc->kvm_type = spapr_kvm_type;
fwc->get_dev_path = spapr_get_fw_dev_path; fwc->get_dev_path = spapr_get_fw_dev_path;
nc->nmi_monitor_handler = spapr_nmi;
} }
static const TypeInfo spapr_machine_info = { static const TypeInfo spapr_machine_info = {
@ -1603,6 +1623,7 @@ static const TypeInfo spapr_machine_info = {
.class_init = spapr_machine_class_init, .class_init = spapr_machine_class_init,
.interfaces = (InterfaceInfo[]) { .interfaces = (InterfaceInfo[]) {
{ TYPE_FW_PATH_PROVIDER }, { TYPE_FW_PATH_PROVIDER },
{ TYPE_NMI },
{ } { }
}, },
}; };

1
target-ppc/cpu-qom.h
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@ -127,6 +127,7 @@ int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, void *opaque); int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
void ppc_cpu_do_system_reset(CPUState *cs);
extern const struct VMStateDescription vmstate_ppc_cpu; extern const struct VMStateDescription vmstate_ppc_cpu;
typedef struct PPCTimebase { typedef struct PPCTimebase {

8
target-ppc/excp_helper.c
View File

@ -810,6 +810,14 @@ void ppc_hw_interrupt(CPUPPCState *env)
} }
} }
} }
void ppc_cpu_do_system_reset(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_RESET);
}
#endif /* !CONFIG_USER_ONLY */ #endif /* !CONFIG_USER_ONLY */
#if defined(DEBUG_OP) #if defined(DEBUG_OP)