mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

softfloat: Revert and reimplement remaining parts of b645bb4885 and 5a6932d51d

Browse Source 
Revert the parts of commits b645bb4885 and 5a6932d51d which are still
in the codebase and under a SoftFloat-2b license.

Reimplement support for architectures where the most significant bit
in the mantissa is 1 for a signaling NaN rather than a quiet NaN,
by adding handling for SNAN_BIT_IS_ONE being set to the functions
which test values for NaN-ness.

This includes restoring the bugfixes lost in the reversion where
some of the float*_is_quiet_nan() functions were returning true
for both signaling and quiet NaNs.

[This is a mechanical squashing together of two separate "revert"
and "reimplement" patches.]

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1421073508-23909-4-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2015-01-12 14:38:27 +00:00
parent 6bb8e0f130
commit 332d584970
1 changed files with 29 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
fpu/softfloat-specialize.h
View File

@ -33,10 +33,14 @@ this code that are retained.
=============================================================================== ===============================================================================
*/ */
/* Does the target distinguish signaling NaNs from non-signaling NaNs
* by setting the most significant bit of the mantissa for a signaling NaN?
* (The more common choice is to have it be zero for SNaN and one for QNaN.)
*/
#if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
#define SNAN_BIT_IS_ONE 1 #define SNAN_BIT_IS_ONE 1
#else #else
#define SNAN_BIT_IS_ONE 0 #define SNAN_BIT_IS_ONE 0
#endif #endif
#if defined(TARGET_XTENSA) #if defined(TARGET_XTENSA)
@ -79,7 +83,7 @@ const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 )); const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
#elif SNAN_BIT_IS_ONE #elif SNAN_BIT_IS_ONE
const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF )); const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
#else #else
const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
#endif #endif
@ -89,7 +93,7 @@ const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
#define floatx80_default_nan_high 0x7FFF #define floatx80_default_nan_high 0x7FFF
#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) #define floatx80_default_nan_low LIT64(0xBFFFFFFFFFFFFFFF)
#else #else
#define floatx80_default_nan_high 0xFFFF #define floatx80_default_nan_high 0xFFFF
#define floatx80_default_nan_low LIT64( 0xC000000000000000 ) #define floatx80_default_nan_low LIT64( 0xC000000000000000 )
@ -103,8 +107,8 @@ const floatx80 floatx80_default_nan
| `low' values hold the most- and least-significant bits, respectively. | `low' values hold the most- and least-significant bits, respectively.
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) #define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) #define float128_default_nan_low LIT64(0xFFFFFFFFFFFFFFFF)
#else #else
#define float128_default_nan_high LIT64( 0xFFFF800000000000 ) #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
#define float128_default_nan_low LIT64( 0x0000000000000000 ) #define float128_default_nan_low LIT64( 0x0000000000000000 )
@ -255,9 +259,9 @@ int float32_is_quiet_nan( float32 a_ )
{ {
uint32_t a = float32_val(a_); uint32_t a = float32_val(a_);
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
#else #else
return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); return ((uint32_t)(a << 1) >= 0xff800000);
#endif #endif
} }
@ -270,7 +274,7 @@ int float32_is_signaling_nan( float32 a_ )
{ {
uint32_t a = float32_val(a_); uint32_t a = float32_val(a_);
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); return ((uint32_t)(a << 1) >= 0xff800000);
#else #else
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
#endif #endif
@ -663,11 +667,10 @@ int float64_is_quiet_nan( float64 a_ )
{ {
uint64_t a = float64_val(a_); uint64_t a = float64_val(a_);
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return return (((a >> 51) & 0xfff) == 0xffe)
( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) && (a & 0x0007ffffffffffffULL);
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
#else #else
return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); return ((a << 1) >= 0xfff0000000000000ULL);
#endif #endif
} }
@ -680,7 +683,7 @@ int float64_is_signaling_nan( float64 a_ )
{ {
uint64_t a = float64_val(a_); uint64_t a = float64_val(a_);
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); return ((a << 1) >= 0xfff0000000000000ULL);
#else #else
return return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
@ -864,11 +867,10 @@ int floatx80_is_quiet_nan( floatx80 a )
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
uint64_t aLow; uint64_t aLow;
aLow = a.low & ~ LIT64( 0x4000000000000000 ); aLow = a.low & ~0x4000000000000000ULL;
return return ((a.high & 0x7fff) == 0x7fff)
( ( a.high & 0x7FFF ) == 0x7FFF ) && (aLow << 1)
&& (uint64_t) ( aLow<<1 ) && (a.low == aLow);
&& ( a.low == aLow );
#else #else
return ( ( a.high & 0x7FFF ) == 0x7FFF ) return ( ( a.high & 0x7FFF ) == 0x7FFF )
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
@ -884,8 +886,8 @@ int floatx80_is_quiet_nan( floatx80 a )
int floatx80_is_signaling_nan( floatx80 a ) int floatx80_is_signaling_nan( floatx80 a )
{ {
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return ( ( a.high & 0x7FFF ) == 0x7FFF ) return ((a.high & 0x7fff) == 0x7fff)
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); && ((a.low << 1) >= 0x8000000000000000ULL);
#else #else
uint64_t aLow; uint64_t aLow;
@ -1029,13 +1031,12 @@ int float128_is_signaling_nan(float128 a_)
int float128_is_quiet_nan( float128 a ) int float128_is_quiet_nan( float128 a )
{ {
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return return (((a.high >> 47) & 0xffff) == 0xfffe)
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) && (a.low || (a.high & 0x00007fffffffffffULL));
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
#else #else
return return
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) ((a.high << 1) >= 0xffff000000000000ULL)
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); && (a.low || (a.high & 0x0000ffffffffffffULL));
#endif #endif
} }
@ -1048,8 +1049,8 @@ int float128_is_signaling_nan( float128 a )
{ {
#if SNAN_BIT_IS_ONE #if SNAN_BIT_IS_ONE
return return
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) ((a.high << 1) >= 0xffff000000000000ULL)
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); && (a.low || (a.high & 0x0000ffffffffffffULL));
#else #else
return return
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )