target-arm: xlnx-zynqmp: Add sdhci support.
Add two SYSBUS_SDHCI devices for xlnx-zynqmp Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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@ -48,6 +48,14 @@ static const int uart_intr[XLNX_ZYNQMP_NUM_UARTS] = {
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21, 22,
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};
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static const uint64_t sdhci_addr[XLNX_ZYNQMP_NUM_SDHCI] = {
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0xFF160000, 0xFF170000,
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};
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static const int sdhci_intr[XLNX_ZYNQMP_NUM_SDHCI] = {
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48, 49,
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};
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typedef struct XlnxZynqMPGICRegion {
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int region_index;
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uint32_t address;
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@ -97,6 +105,13 @@ static void xlnx_zynqmp_init(Object *obj)
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object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI);
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qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
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for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
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object_initialize(&s->sdhci[i], sizeof(s->sdhci[i]),
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TYPE_SYSBUS_SDHCI);
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qdev_set_parent_bus(DEVICE(&s->sdhci[i]),
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sysbus_get_default());
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}
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}
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static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
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@ -258,6 +273,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]);
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for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
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object_property_set_bool(OBJECT(&s->sdhci[i]), true,
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"realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
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sdhci_addr[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
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gic_spi[sdhci_intr[i]]);
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}
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}
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static Property xlnx_zynqmp_props[] = {
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@ -24,6 +24,7 @@
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#include "hw/char/cadence_uart.h"
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#include "hw/ide/pci.h"
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#include "hw/ide/ahci.h"
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#include "hw/sd/sdhci.h"
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#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
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#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
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@ -33,6 +34,7 @@
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#define XLNX_ZYNQMP_NUM_RPU_CPUS 2
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#define XLNX_ZYNQMP_NUM_GEMS 4
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#define XLNX_ZYNQMP_NUM_UARTS 2
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#define XLNX_ZYNQMP_NUM_SDHCI 2
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#define XLNX_ZYNQMP_NUM_OCM_BANKS 4
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#define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000
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@ -63,6 +65,7 @@ typedef struct XlnxZynqMPState {
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CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
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CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
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SysbusAHCIState sata;
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SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI];
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char *boot_cpu;
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ARMCPU *boot_cpu_ptr;
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