From 32be62a3d811fa9f389ff791ac6c5cecf69b2109 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Mon, 5 Jun 2023 23:51:45 +0200 Subject: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We don't emulate the gigabit ethernet part of the chip but the MorphOS driver accesses these and expects to get some valid looking result otherwise it hangs. Add some minimal dummy implementation to avoid rhis. Signed-off-by: BALATON Zoltan Acked-by: Cédric Le Goater Message-ID: <20230605215145.29458746335@zero.eik.bme.hu> Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/mv64361.c | 6 ++++++ hw/pci-host/mv643xx.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c index 19e8031a3f..01bd8c887f 100644 --- a/hw/pci-host/mv64361.c +++ b/hw/pci-host/mv64361.c @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr addr, unsigned int size) } } break; + case MV64340_ETH_PHY_ADDR: + ret = 0x98; + break; + case MV64340_ETH_SMI: + ret = BIT(27); + break; case MV64340_CUNIT_ARBITER_CONTROL_REG: ret = 0x11ff0000 | (s->gpp_int_level << 10); break; diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h index cd26a43f18..f2e1baea88 100644 --- a/hw/pci-host/mv643xx.h +++ b/hw/pci-host/mv643xx.h @@ -656,6 +656,9 @@ /* Ethernet Unit Registers */ /****************************************/ +#define MV64340_ETH_PHY_ADDR 0x2000 +#define MV64340_ETH_SMI 0x2004 + /*******************************************/ /* CUNIT Registers */ /*******************************************/