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tcg/ppc: Use TCG_REG_TMP2 for scratch index in prepare_host_addr

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In tcg_out_qemu_ldst_i128, we need a non-zero index register,
which we then use as a base register in several address modes.
Since we always have TCG_REG_TMP2 available, use that.

Cc: qemu-stable@nongnu.org
Fixes: 526cd4ec01 ("tcg/ppc: Support 128-bit load/store")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2597
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-By: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Richard Henderson 2024-10-05 22:09:54 +00:00
parent 4cabcb89b1
commit 3213da7b95
1 changed files with 2 additions and 2 deletions
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4
tcg/ppc/tcg-target.c.inc
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@ -2617,8 +2617,8 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
if (TCG_TARGET_REG_BITS == 64 && addr_type == TCG_TYPE_I32) {
/* Zero-extend the guest address for use in the host address. */
tcg_out_ext32u(s, TCG_REG_R0, addrlo);
h->index = TCG_REG_R0;
tcg_out_ext32u(s, TCG_REG_TMP2, addrlo);
h->index = TCG_REG_TMP2;
} else {
h->index = addrlo;
}