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target/sh4: Fix SUBV opcode

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The documentation says:

  SUBV Rm, Rn        Rn - Rm -> Rn, underflow -> T

The overflow / underflow can be calculated as:

  T = ((Rn ^ Rm) & (Result ^ Rn)) >> 31

However we were using the incorrect:

  T = ((Rn ^ Rm) & (Result ^ Rm)) >> 31

Fix by using the Rn register instead of Rm.

Add tests provided by Paul Cercueil.

Cc: qemu-stable@nongnu.org
Fixes: ad8d25a11f ("target-sh4: implement addv and subv using TCG")
Reported-by: Paul Cercueil <paul@crapouillou.net>
Suggested-by: Paul Cercueil <paul@crapouillou.net>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2318
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20240430163125.77430-3-philmd@linaro.org>
(cherry picked from commit e88a856efd)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Philippe Mathieu-Daudé 2024-04-30 13:10:19 +02:00 committed by Michael Tokarev
parent ea86652019
commit 30e8861a90
3 changed files with 34 additions and 1 deletions
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2
target/sh4/translate.c
View File

@ -933,7 +933,7 @@ static void _decode_opc(DisasContext * ctx)
t0 = tcg_temp_new();
tcg_gen_sub_i32(t0, REG(B11_8), REG(B7_4));
t1 = tcg_temp_new();
tcg_gen_xor_i32(t1, t0, REG(B7_4));
tcg_gen_xor_i32(t1, t0, REG(B11_8));
t2 = tcg_temp_new();
tcg_gen_xor_i32(t2, REG(B11_8), REG(B7_4));
tcg_gen_and_i32(t1, t1, t2);

3
tests/tcg/sh4/Makefile.target
View File

@ -20,3 +20,6 @@ TESTS += test-macw
test-addv: CFLAGS += -O -g
TESTS += test-addv
test-subv: CFLAGS += -O -g
TESTS += test-subv

30
tests/tcg/sh4/test-subv.c Normal file
View File

@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <limits.h>
#include <stdio.h>
#include <stdlib.h>
static void subv(const int a, const int b, const int res, const int carry)
{
int o = a, c;
asm volatile("subv %2,%0\n"
"movt %1\n"
: "+r"(o), "=r"(c) : "r"(b) : );
if (c != carry || o != res) {
printf("SUBV %d, %d = %d/%d [T = %d/%d]\n", a, b, o, res, c, carry);
abort();
}
}
int main(void)
{
subv(INT_MIN, 1, INT_MAX, 1);
subv(INT_MAX, -1, INT_MIN, 1);
subv(INT_MAX, 1, INT_MAX - 1, 0);
subv(0, 1, -1, 0);
subv(-1, -1, 0, 0);
return 0;
}