tests: Add a simple test of the CMSDK APB timer

Add a simple test of the CMSDK APB timer, since we're about to do
some refactoring of how it is clocked.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210128114145.20536-4-peter.maydell@linaro.org
Message-id: 20210121190622.22000-4-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2021-01-28 11:41:23 +00:00
parent 132b10251c
commit 30858dafd1
3 changed files with 77 additions and 0 deletions

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@ -581,6 +581,7 @@ F: include/hw/rtc/pl031.h
F: include/hw/arm/primecell.h
F: hw/timer/cmsdk-apb-timer.c
F: include/hw/timer/cmsdk-apb-timer.h
F: tests/qtest/cmsdk-apb-timer-test.c
F: hw/timer/cmsdk-apb-dualtimer.c
F: include/hw/timer/cmsdk-apb-dualtimer.h
F: hw/char/cmsdk-apb-uart.c

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@ -0,0 +1,75 @@
/*
* QTest testcase for the CMSDK APB timer device
*
* Copyright (c) 2021 Linaro Limited
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*/
#include "qemu/osdep.h"
#include "libqtest-single.h"
/* IoTKit/ARMSSE-200 timer0; driven at 25MHz in mps2-an385, so 40ns per tick */
#define TIMER_BASE 0x40000000
#define CTRL 0
#define VALUE 4
#define RELOAD 8
#define INTSTATUS 0xc
static void test_timer(void)
{
g_assert_true(readl(TIMER_BASE + INTSTATUS) == 0);
/* Start timer: will fire after 40 * 1000 == 40000 ns */
writel(TIMER_BASE + RELOAD, 1000);
writel(TIMER_BASE + CTRL, 9);
/* Step to just past the 500th tick and check VALUE */
clock_step(40 * 500 + 1);
g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 0);
g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 500);
/* Just past the 1000th tick: timer should have fired */
clock_step(40 * 500);
g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 1);
g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 0);
/* VALUE reloads at the following tick */
clock_step(40);
g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 1000);
/* Check write-1-to-clear behaviour of INTSTATUS */
writel(TIMER_BASE + INTSTATUS, 0);
g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 1);
writel(TIMER_BASE + INTSTATUS, 1);
g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 0);
/* Turn off the timer */
writel(TIMER_BASE + CTRL, 0);
}
int main(int argc, char **argv)
{
int r;
g_test_init(&argc, &argv, NULL);
qtest_start("-machine mps2-an385");
qtest_add_func("/cmsdk-apb-timer/timer", test_timer);
r = g_test_run();
qtest_end();
return r;
}

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@ -142,6 +142,7 @@ qtests_npcm7xx = \
'npcm7xx_timer-test',
'npcm7xx_watchdog_timer-test']
qtests_arm = \
(config_all_devices.has_key('CONFIG_CMSDK_APB_TIMER') ? ['cmsdk-apb-timer-test'] : []) + \
(config_all_devices.has_key('CONFIG_PFLASH_CFI02') ? ['pflash-cfi02-test'] : []) + \
(config_all_devices.has_key('CONFIG_NPCM7XX') ? qtests_npcm7xx : []) + \
['arm-cpu-features',