target-mips: update address space definitions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -8,14 +8,14 @@
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#define TARGET_PAGE_BITS 12
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#define TARGET_PAGE_BITS 12
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#define MIPS_TLB_MAX 128
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#define MIPS_TLB_MAX 128
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/* ??? MIPS64 no doubt has a larger address space. */
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#define TARGET_PHYS_ADDR_SPACE_BITS 32
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#if defined(TARGET_MIPS64)
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#if defined(TARGET_MIPS64)
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#define TARGET_LONG_BITS 64
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#define TARGET_LONG_BITS 64
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#define TARGET_PHYS_ADDR_SPACE_BITS 36
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#define TARGET_VIRT_ADDR_SPACE_BITS 42
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#else
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#else
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#define TARGET_LONG_BITS 32
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#define TARGET_LONG_BITS 32
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#define TARGET_PHYS_ADDR_SPACE_BITS 36
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#endif
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#endif
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/* Masks used to mark instructions to indicate which ISA level they
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/* Masks used to mark instructions to indicate which ISA level they
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