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accel/tcg: Add pc and host_pc params to gen_intermediate_code

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Pass these along to translator_loop -- pc may be used instead
of tb->pc, and host_pc is currently unused.  Adjust all targets
at one time.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-08-11 13:48:03 -07:00
parent dac8d19bdb
commit 306c872103
25 changed files with 97 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
accel/tcg/translate-all.c
View File

@ -46,6 +46,7 @@
#include "exec/cputlb.h"
#include "exec/translate-all.h"
#include "exec/translator.h"
#include "qemu/bitmap.h"
#include "qemu/qemu-print.h"
#include "qemu/timer.h"
@ -1392,11 +1393,12 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
TCGProfile *prof = &tcg_ctx->prof;
int64_t ti;
#endif
void *host_pc;
assert_memory_lock();
qemu_thread_jit_write();
phys_pc = get_page_addr_code(env, pc);
phys_pc = get_page_addr_code_hostp(env, pc, &host_pc);
if (phys_pc == -1) {
/* Generate a one-shot TB with 1 insn in it */
@ -1444,7 +1446,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
tcg_func_start(tcg_ctx);
tcg_ctx->cpu = env_cpu(env);
gen_intermediate_code(cpu, tb, max_insns);
gen_intermediate_code(cpu, tb, max_insns, pc, host_pc);
assert(tb->size != 0);
tcg_ctx->cpu = NULL;
max_insns = tb->icount;

9
accel/tcg/translator.c
View File

@ -51,16 +51,17 @@ static inline void translator_page_protect(DisasContextBase *dcbase,
#endif
}
void translator_loop(const TranslatorOps *ops, DisasContextBase *db,
CPUState *cpu, TranslationBlock *tb, int max_insns)
void translator_loop(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc,
const TranslatorOps *ops, DisasContextBase *db)
{
uint32_t cflags = tb_cflags(tb);
bool plugin_enabled;
/* Initialize DisasContext */
db->tb = tb;
db->pc_first = tb->pc;
db->pc_next = db->pc_first;
db->pc_first = pc;
db->pc_next = pc;
db->is_jmp = DISAS_NEXT;
db->num_insns = 0;
db->max_insns = max_insns;

1
include/exec/exec-all.h
View File

@ -39,7 +39,6 @@ typedef ram_addr_t tb_page_addr_t;
#define TB_PAGE_ADDR_FMT RAM_ADDR_FMT
#endif
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns);
void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
target_ulong *data);

24
include/exec/translator.h
View File

@ -26,6 +26,19 @@
#include "exec/translate-all.h"
#include "tcg/tcg.h"
/**
* gen_intermediate_code
* @cpu: cpu context
* @tb: translation block
* @max_insns: max number of instructions to translate
* @pc: guest virtual program counter address
* @host_pc: host physical program counter address
*
* This function must be provided by the target, which should create
* the target-specific DisasContext, and then invoke translator_loop.
*/
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc);
/**
* DisasJumpType:
@ -123,11 +136,13 @@ typedef struct TranslatorOps {
/**
* translator_loop:
* @ops: Target-specific operations.
* @db: Disassembly context.
* @cpu: Target vCPU.
* @tb: Translation block.
* @max_insns: Maximum number of insns to translate.
* @pc: guest virtual program counter address
* @host_pc: host physical program counter address
* @ops: Target-specific operations.
* @db: Disassembly context.
*
* Generic translator loop.
*
@ -141,8 +156,9 @@ typedef struct TranslatorOps {
* - When single-stepping is enabled (system-wide or on the current vCPU).
* - When too many instructions have been translated.
*/
void translator_loop(const TranslatorOps *ops, DisasContextBase *db,
CPUState *cpu, TranslationBlock *tb, int max_insns);
void translator_loop(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc,
const TranslatorOps *ops, DisasContextBase *db);
void translator_loop_temp_check(DisasContextBase *db);

5
target/alpha/translate.c
View File

@ -3043,10 +3043,11 @@ static const TranslatorOps alpha_tr_ops = {
.disas_log = alpha_tr_disas_log,
};
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&alpha_tr_ops, &dc.base, cpu, tb, max_insns);
translator_loop(cpu, tb, max_insns, pc, host_pc, &alpha_tr_ops, &dc.base);
}
void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb,

5
target/arm/translate.c
View File

@ -9892,7 +9892,8 @@ static const TranslatorOps thumb_translator_ops = {
};
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc = { };
const TranslatorOps *ops = &arm_translator_ops;
@ -9907,7 +9908,7 @@ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
}
#endif
translator_loop(ops, &dc.base, cpu, tb, max_insns);
translator_loop(cpu, tb, max_insns, pc, host_pc, ops, &dc.base);
}
void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb,

5
target/avr/translate.c
View File

@ -3049,10 +3049,11 @@ static const TranslatorOps avr_tr_ops = {
.disas_log = avr_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc = { };
translator_loop(&avr_tr_ops, &dc.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &avr_tr_ops, &dc.base);
}
void restore_state_to_opc(CPUAVRState *env, TranslationBlock *tb,

5
target/cris/translate.c
View File

@ -3286,10 +3286,11 @@ static const TranslatorOps cris_tr_ops = {
.disas_log = cris_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&cris_tr_ops, &dc.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &cris_tr_ops, &dc.base);
}
void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags)

6
target/hexagon/translate.c
View File

@ -850,11 +850,13 @@ static const TranslatorOps hexagon_tr_ops = {
.disas_log = hexagon_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&hexagon_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc,
&hexagon_tr_ops, &ctx.base);
}
#define NAME_LEN 64

5
target/hppa/translate.c
View File

@ -4340,10 +4340,11 @@ static const TranslatorOps hppa_tr_ops = {
.disas_log = hppa_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&hppa_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &hppa_tr_ops, &ctx.base);
}
void restore_state_to_opc(CPUHPPAState *env, TranslationBlock *tb,

5
target/i386/tcg/translate.c
View File

@ -8821,11 +8821,12 @@ static const TranslatorOps i386_tr_ops = {
};
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&i386_tr_ops, &dc.base, cpu, tb, max_insns);
translator_loop(cpu, tb, max_insns, pc, host_pc, &i386_tr_ops, &dc.base);
}
void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb,

6
target/loongarch/translate.c
View File

@ -241,11 +241,13 @@ static const TranslatorOps loongarch_tr_ops = {
.disas_log = loongarch_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&loongarch_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc,
&loongarch_tr_ops, &ctx.base);
}
void loongarch_translate_init(void)

5
target/m68k/translate.c
View File

@ -6361,10 +6361,11 @@ static const TranslatorOps m68k_tr_ops = {
.disas_log = m68k_tr_disas_log,
};
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&m68k_tr_ops, &dc.base, cpu, tb, max_insns);
translator_loop(cpu, tb, max_insns, pc, host_pc, &m68k_tr_ops, &dc.base);
}
static double floatx80_to_double(CPUM68KState *env, uint16_t high, uint64_t low)

5
target/microblaze/translate.c
View File

@ -1849,10 +1849,11 @@ static const TranslatorOps mb_tr_ops = {
.disas_log = mb_tr_disas_log,
};
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&mb_tr_ops, &dc.base, cpu, tb, max_insns);
translator_loop(cpu, tb, max_insns, pc, host_pc, &mb_tr_ops, &dc.base);
}
void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)

5
target/mips/tcg/translate.c
View File

@ -16155,11 +16155,12 @@ static const TranslatorOps mips_tr_ops = {
.disas_log = mips_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&mips_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &mips_tr_ops, &ctx.base);
}
void mips_tcg_init(void)

5
target/nios2/translate.c
View File

@ -1038,10 +1038,11 @@ static const TranslatorOps nios2_tr_ops = {
.disas_log = nios2_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&nios2_tr_ops, &dc.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &nios2_tr_ops, &dc.base);
}
void nios2_cpu_dump_state(CPUState *cs, FILE *f, int flags)

6
target/openrisc/translate.c
View File

@ -1705,11 +1705,13 @@ static const TranslatorOps openrisc_tr_ops = {
.disas_log = openrisc_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&openrisc_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc,
&openrisc_tr_ops, &ctx.base);
}
void openrisc_cpu_dump_state(CPUState *cs, FILE *f, int flags)

5
target/ppc/translate.c
View File

@ -7719,11 +7719,12 @@ static const TranslatorOps ppc_tr_ops = {
.disas_log = ppc_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&ppc_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &ppc_tr_ops, &ctx.base);
}
void restore_state_to_opc(CPUPPCState *env, TranslationBlock *tb,

5
target/riscv/translate.c
View File

@ -1196,11 +1196,12 @@ static const TranslatorOps riscv_tr_ops = {
.disas_log = riscv_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&riscv_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &riscv_tr_ops, &ctx.base);
}
void riscv_translate_init(void)

5
target/rx/translate.c
View File

@ -2363,11 +2363,12 @@ static const TranslatorOps rx_tr_ops = {
.disas_log = rx_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&rx_tr_ops, &dc.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &rx_tr_ops, &dc.base);
}
void restore_state_to_opc(CPURXState *env, TranslationBlock *tb,

5
target/s390x/tcg/translate.c
View File

@ -6676,11 +6676,12 @@ static const TranslatorOps s390x_tr_ops = {
.disas_log = s390x_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc;
translator_loop(&s390x_tr_ops, &dc.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &s390x_tr_ops, &dc.base);
}
void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb,

5
target/sh4/translate.c
View File

@ -2368,11 +2368,12 @@ static const TranslatorOps sh4_tr_ops = {
.disas_log = sh4_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&sh4_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &sh4_tr_ops, &ctx.base);
}
void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb,

5
target/sparc/translate.c
View File

@ -5917,11 +5917,12 @@ static const TranslatorOps sparc_tr_ops = {
.disas_log = sparc_tr_disas_log,
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc = {};
translator_loop(&sparc_tr_ops, &dc.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc, &sparc_tr_ops, &dc.base);
}
void sparc_tcg_init(void)

6
target/tricore/translate.c
View File

@ -8878,10 +8878,12 @@ static const TranslatorOps tricore_tr_ops = {
};
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext ctx;
translator_loop(&tricore_tr_ops, &ctx.base, cs, tb, max_insns);
translator_loop(cs, tb, max_insns, pc, host_pc,
&tricore_tr_ops, &ctx.base);
}
void

6
target/xtensa/translate.c
View File

@ -1279,10 +1279,12 @@ static const TranslatorOps xtensa_translator_ops = {
.disas_log = xtensa_tr_disas_log,
};
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns)
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc)
{
DisasContext dc = {};
translator_loop(&xtensa_translator_ops, &dc.base, cpu, tb, max_insns);
translator_loop(cpu, tb, max_insns, pc, host_pc,
&xtensa_translator_ops, &dc.base);
}
void xtensa_cpu_dump_state(CPUState *cs, FILE *f, int flags)