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tcg/i386: Support TCG_COND_TST{EQ,NE}

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Merge tcg_out_testi into tcg_out_cmp and adjust the two uses.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-27 16:32:37 -07:00
parent 6749d85bd7
commit 303214aac9
2 changed files with 60 additions and 37 deletions
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95
tcg/i386/tcg-target.c.inc
View File

@ -506,6 +506,8 @@ static const uint8_t tcg_cond_to_jcc[] = {
[TCG_COND_GEU] = JCC_JAE,
[TCG_COND_LEU] = JCC_JBE,
[TCG_COND_GTU] = JCC_JA,
[TCG_COND_TSTEQ] = JCC_JE,
[TCG_COND_TSTNE] = JCC_JNE,
};
#if TCG_TARGET_REG_BITS == 64
@ -1452,17 +1454,49 @@ static void tcg_out_jxx(TCGContext *s, int opc, TCGLabel *l, bool small)
static int tcg_out_cmp(TCGContext *s, TCGCond cond, TCGArg arg1,
TCGArg arg2, int const_arg2, int rexw)
{
if (const_arg2) {
if (arg2 == 0) {
/* test r, r */
int jz;
if (!is_tst_cond(cond)) {
if (!const_arg2) {
tgen_arithr(s, ARITH_CMP + rexw, arg1, arg2);
} else if (arg2 == 0) {
tcg_out_modrm(s, OPC_TESTL + rexw, arg1, arg1);
} else {
tcg_debug_assert(!rexw || arg2 == (int32_t)arg2);
tgen_arithi(s, ARITH_CMP + rexw, arg1, arg2, 0);
}
} else {
tgen_arithr(s, ARITH_CMP + rexw, arg1, arg2);
return tcg_cond_to_jcc[cond];
}
return tcg_cond_to_jcc[cond];
jz = tcg_cond_to_jcc[cond];
if (!const_arg2) {
tcg_out_modrm(s, OPC_TESTL + rexw, arg1, arg2);
return jz;
}
if (arg2 <= 0xff && (TCG_TARGET_REG_BITS == 64 || arg1 < 4)) {
tcg_out_modrm(s, OPC_GRP3_Eb | P_REXB_RM, EXT3_TESTi, arg1);
tcg_out8(s, arg2);
return jz;
}
if ((arg2 & ~0xff00) == 0 && arg1 < 4) {
tcg_out_modrm(s, OPC_GRP3_Eb, EXT3_TESTi, arg1 + 4);
tcg_out8(s, arg2 >> 8);
return jz;
}
if (rexw) {
if (arg2 == (uint32_t)arg2) {
rexw = 0;
} else {
tcg_debug_assert(arg2 == (int32_t)arg2);
}
}
tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_TESTi, arg1);
tcg_out32(s, arg2);
return jz;
}
static void tcg_out_brcond(TCGContext *s, int rexw, TCGCond cond,
@ -1479,18 +1513,21 @@ static void tcg_out_brcond2(TCGContext *s, const TCGArg *args,
{
TCGLabel *label_next = gen_new_label();
TCGLabel *label_this = arg_label(args[5]);
TCGCond cond = args[4];
switch(args[4]) {
switch (cond) {
case TCG_COND_EQ:
tcg_out_brcond(s, 0, TCG_COND_NE, args[0], args[2], const_args[2],
label_next, 1);
tcg_out_brcond(s, 0, TCG_COND_EQ, args[1], args[3], const_args[3],
case TCG_COND_TSTEQ:
tcg_out_brcond(s, 0, tcg_invert_cond(cond),
args[0], args[2], const_args[2], label_next, 1);
tcg_out_brcond(s, 0, cond, args[1], args[3], const_args[3],
label_this, small);
break;
case TCG_COND_NE:
tcg_out_brcond(s, 0, TCG_COND_NE, args[0], args[2], const_args[2],
case TCG_COND_TSTNE:
tcg_out_brcond(s, 0, cond, args[0], args[2], const_args[2],
label_this, small);
tcg_out_brcond(s, 0, TCG_COND_NE, args[1], args[3], const_args[3],
tcg_out_brcond(s, 0, cond, args[1], args[3], const_args[3],
label_this, small);
break;
case TCG_COND_LT:
@ -1827,23 +1864,6 @@ static void tcg_out_nopn(TCGContext *s, int n)
tcg_out8(s, 0x90);
}
/* Test register R vs immediate bits I, setting Z flag for EQ/NE. */
static void __attribute__((unused))
tcg_out_testi(TCGContext *s, TCGReg r, uint32_t i)
{
/*
* This is used for testing alignment, so we can usually use testb.
* For i686, we have to use testl for %esi/%edi.
*/
if (i <= 0xff && (TCG_TARGET_REG_BITS == 64 || r < 4)) {
tcg_out_modrm(s, OPC_GRP3_Eb | P_REXB_RM, EXT3_TESTi, r);
tcg_out8(s, i);
} else {
tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_TESTi, r);
tcg_out32(s, i);
}
}
typedef struct {
TCGReg base;
int index;
@ -2104,16 +2124,17 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0,
offsetof(CPUTLBEntry, addend));
} else if (a_mask) {
ldst = new_ldst_label(s);
int jcc;
ldst = new_ldst_label(s);
ldst->is_ld = is_ld;
ldst->oi = oi;
ldst->addrlo_reg = addrlo;
ldst->addrhi_reg = addrhi;
tcg_out_testi(s, addrlo, a_mask);
/* jne slow_path */
tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0);
jcc = tcg_out_cmp(s, TCG_COND_TSTNE, addrlo, a_mask, true, false);
tcg_out_opc(s, OPC_JCC_long + jcc, 0, 0, 0);
ldst->label_ptr[0] = s->code_ptr;
s->code_ptr += 4;
}
@ -2259,9 +2280,10 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
} else {
TCGLabel *l1 = gen_new_label();
TCGLabel *l2 = gen_new_label();
int jcc;
tcg_out_testi(s, h.base, 15);
tcg_out_jxx(s, JCC_JNE, l1, true);
jcc = tcg_out_cmp(s, TCG_COND_TSTNE, h.base, 15, true, false);
tcg_out_jxx(s, jcc, l1, true);
tcg_out_vex_modrm_sib_offset(s, OPC_MOVDQA_VxWx + h.seg,
TCG_TMP_VEC, 0,
@ -2387,9 +2409,10 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
} else {
TCGLabel *l1 = gen_new_label();
TCGLabel *l2 = gen_new_label();
int jcc;
tcg_out_testi(s, h.base, 15);
tcg_out_jxx(s, JCC_JNE, l1, true);
jcc = tcg_out_cmp(s, TCG_COND_TSTNE, h.base, 15, true, false);
tcg_out_jxx(s, jcc, l1, true);
tcg_out_vex_modrm_sib_offset(s, OPC_MOVDQA_WxVx + h.seg,
TCG_TMP_VEC, 0,

2
tcg/i386/tcg-target.h
View File

@ -198,7 +198,7 @@ typedef enum {
#define TCG_TARGET_HAS_qemu_ldst_i128 \
(TCG_TARGET_REG_BITS == 64 && (cpuinfo & CPUINFO_ATOMIC_VMOVDQA))
#define TCG_TARGET_HAS_tst 0
#define TCG_TARGET_HAS_tst 1
/* We do not support older SSE systems, only beginning with AVX1. */
#define TCG_TARGET_HAS_v64 have_avx1