target/arm: Use tcg_constant for MOVW, UMAAL, CRC32
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220426163043.100432-30-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -5652,14 +5652,11 @@ static bool trans_ADR(DisasContext *s, arg_ri *a)
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static bool trans_MOVW(DisasContext *s, arg_MOVW *a)
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{
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TCGv_i32 tmp;
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if (!ENABLE_ARCH_6T2) {
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return false;
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}
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tmp = tcg_const_i32(a->imm);
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store_reg(s, a->rd, tmp);
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store_reg(s, a->rd, tcg_constant_i32(a->imm));
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return true;
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}
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@ -6030,14 +6027,13 @@ static bool trans_UMAAL(DisasContext *s, arg_UMAAL *a)
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t0 = load_reg(s, a->rm);
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t1 = load_reg(s, a->rn);
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tcg_gen_mulu2_i32(t0, t1, t0, t1);
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zero = tcg_const_i32(0);
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zero = tcg_constant_i32(0);
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t2 = load_reg(s, a->ra);
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tcg_gen_add2_i32(t0, t1, t0, t1, t2, zero);
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tcg_temp_free_i32(t2);
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t2 = load_reg(s, a->rd);
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tcg_gen_add2_i32(t0, t1, t0, t1, t2, zero);
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tcg_temp_free_i32(t2);
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tcg_temp_free_i32(zero);
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store_reg(s, a->ra, t0);
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store_reg(s, a->rd, t1);
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return true;
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@ -6284,14 +6280,13 @@ static bool op_crc32(DisasContext *s, arg_rrr *a, bool c, MemOp sz)
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default:
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g_assert_not_reached();
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}
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t3 = tcg_const_i32(1 << sz);
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t3 = tcg_constant_i32(1 << sz);
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if (c) {
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gen_helper_crc32c(t1, t1, t2, t3);
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} else {
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gen_helper_crc32(t1, t1, t2, t3);
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}
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tcg_temp_free_i32(t2);
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tcg_temp_free_i32(t3);
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store_reg(s, a->rd, t1);
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return true;
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}
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