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hw/char/sh_serial: Rename type sh_serial_state to SHSerialState

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Coding style says types should be camel case.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <0f185653528c99eeeb2b4e4afb8b818d93298c20.1635541329.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
BALATON Zoltan 2021-10-29 23:02:09 +02:00 committed by Philippe Mathieu-Daudé
parent 3cf7ce4337
commit 2f6df13748
1 changed files with 11 additions and 13 deletions
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24
hw/char/sh_serial.c
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@ -73,9 +73,9 @@ typedef struct {
qemu_irq txi;
qemu_irq tei;
qemu_irq bri;
} sh_serial_state;
} SHSerialState;
static void sh_serial_clear_fifo(sh_serial_state *s)
static void sh_serial_clear_fifo(SHSerialState *s)
{
memset(s->rx_fifo, 0, SH_RX_FIFO_LENGTH);
s->rx_cnt = 0;
@ -86,7 +86,7 @@ static void sh_serial_clear_fifo(sh_serial_state *s)
static void sh_serial_write(void *opaque, hwaddr offs,
uint64_t val, unsigned size)
{
sh_serial_state *s = opaque;
SHSerialState *s = opaque;
unsigned char ch;
trace_sh_serial_write(size, offs, val);
@ -204,7 +204,7 @@ static void sh_serial_write(void *opaque, hwaddr offs,
static uint64_t sh_serial_read(void *opaque, hwaddr offs,
unsigned size)
{
sh_serial_state *s = opaque;
SHSerialState *s = opaque;
uint32_t ret = UINT32_MAX;
#if 0
@ -309,12 +309,12 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
return ret;
}
static int sh_serial_can_receive(sh_serial_state *s)
static int sh_serial_can_receive(SHSerialState *s)
{
return s->scr & (1 << 4);
}
static void sh_serial_receive_break(sh_serial_state *s)
static void sh_serial_receive_break(SHSerialState *s)
{
if (s->feat & SH_SERIAL_FEAT_SCIF) {
s->sr |= (1 << 4);
@ -323,13 +323,13 @@ static void sh_serial_receive_break(sh_serial_state *s)
static int sh_serial_can_receive1(void *opaque)
{
sh_serial_state *s = opaque;
SHSerialState *s = opaque;
return sh_serial_can_receive(s);
}
static void sh_serial_timeout_int(void *opaque)
{
sh_serial_state *s = opaque;
SHSerialState *s = opaque;
s->flags |= SH_SERIAL_FLAG_RDF;
if (s->scr & (1 << 6) && s->rxi) {
@ -339,7 +339,7 @@ static void sh_serial_timeout_int(void *opaque)
static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
{
sh_serial_state *s = opaque;
SHSerialState *s = opaque;
if (s->feat & SH_SERIAL_FEAT_SCIF) {
int i;
@ -369,7 +369,7 @@ static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
static void sh_serial_event(void *opaque, QEMUChrEvent event)
{
sh_serial_state *s = opaque;
SHSerialState *s = opaque;
if (event == CHR_EVENT_BREAK) {
sh_serial_receive_break(s);
}
@ -390,9 +390,7 @@ void sh_serial_init(MemoryRegion *sysmem,
qemu_irq tei_source,
qemu_irq bri_source)
{
sh_serial_state *s;
s = g_malloc0(sizeof(sh_serial_state));
SHSerialState *s = g_malloc0(sizeof(*s));
s->feat = feat;
s->flags = SH_SERIAL_FLAG_TEND | SH_SERIAL_FLAG_TDE;