target/i386: Replace TARGET_TB_PCREL
with CF_PCREL
Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230227135202.9710-8-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -520,7 +520,7 @@ static inline target_ulong get_memio_eip(CPUX86State *env)
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}
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/* Per x86_restore_state_to_opc. */
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if (TARGET_TB_PCREL) {
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if (cs->tcg_cflags & CF_PCREL) {
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return (env->eip & TARGET_PAGE_MASK) | data[0];
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} else {
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return data[0] - env->segs[R_CS].base;
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@ -49,8 +49,8 @@ static void x86_cpu_exec_exit(CPUState *cs)
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static void x86_cpu_synchronize_from_tb(CPUState *cs,
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const TranslationBlock *tb)
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{
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/* The instruction pointer is always up to date with TARGET_TB_PCREL. */
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if (!TARGET_TB_PCREL) {
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/* The instruction pointer is always up to date with CF_PCREL. */
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if (!(tb_cflags(tb) & CF_PCREL)) {
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CPUX86State *env = cs->env_ptr;
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env->eip = tb_pc(tb) - tb->cs_base;
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}
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@ -64,7 +64,7 @@ static void x86_restore_state_to_opc(CPUState *cs,
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CPUX86State *env = &cpu->env;
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int cc_op = data[1];
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if (TARGET_TB_PCREL) {
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if (tb_cflags(tb) & CF_PCREL) {
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env->eip = (env->eip & TARGET_PAGE_MASK) | data[0];
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} else {
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env->eip = data[0] - tb->cs_base;
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@ -545,7 +545,7 @@ static inline void gen_op_st_rm_T0_A0(DisasContext *s, int idx, int d)
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static void gen_update_eip_cur(DisasContext *s)
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{
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assert(s->pc_save != -1);
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if (TARGET_TB_PCREL) {
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if (tb_cflags(s->base.tb) & CF_PCREL) {
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tcg_gen_addi_tl(cpu_eip, cpu_eip, s->base.pc_next - s->pc_save);
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} else {
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tcg_gen_movi_tl(cpu_eip, s->base.pc_next - s->cs_base);
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@ -556,7 +556,7 @@ static void gen_update_eip_cur(DisasContext *s)
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static void gen_update_eip_next(DisasContext *s)
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{
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assert(s->pc_save != -1);
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if (TARGET_TB_PCREL) {
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if (tb_cflags(s->base.tb) & CF_PCREL) {
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tcg_gen_addi_tl(cpu_eip, cpu_eip, s->pc - s->pc_save);
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} else {
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tcg_gen_movi_tl(cpu_eip, s->pc - s->cs_base);
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@ -588,7 +588,7 @@ static TCGv_i32 eip_next_i32(DisasContext *s)
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if (CODE64(s)) {
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return tcg_constant_i32(-1);
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}
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if (TARGET_TB_PCREL) {
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if (tb_cflags(s->base.tb) & CF_PCREL) {
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TCGv_i32 ret = tcg_temp_new_i32();
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tcg_gen_trunc_tl_i32(ret, cpu_eip);
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tcg_gen_addi_i32(ret, ret, s->pc - s->pc_save);
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@ -601,7 +601,7 @@ static TCGv_i32 eip_next_i32(DisasContext *s)
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static TCGv eip_next_tl(DisasContext *s)
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{
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assert(s->pc_save != -1);
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if (TARGET_TB_PCREL) {
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if (tb_cflags(s->base.tb) & CF_PCREL) {
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TCGv ret = tcg_temp_new();
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tcg_gen_addi_tl(ret, cpu_eip, s->pc - s->pc_save);
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return ret;
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@ -613,7 +613,7 @@ static TCGv eip_next_tl(DisasContext *s)
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static TCGv eip_cur_tl(DisasContext *s)
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{
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assert(s->pc_save != -1);
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if (TARGET_TB_PCREL) {
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if (tb_cflags(s->base.tb) & CF_PCREL) {
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TCGv ret = tcg_temp_new();
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tcg_gen_addi_tl(ret, cpu_eip, s->base.pc_next - s->pc_save);
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return ret;
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@ -1830,7 +1830,7 @@ static void gen_rot_rm_T1(DisasContext *s, MemOp ot, int op1, int is_right)
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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/* The CC_OP value is no longer predictable. */
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/* The CC_OP value is no longer predictable. */
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set_cc_op(s, CC_OP_DYNAMIC);
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}
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@ -1923,7 +1923,7 @@ static void gen_rotc_rm_T1(DisasContext *s, MemOp ot, int op1,
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gen_op_ld_v(s, ot, s->T0, s->A0);
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else
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gen_op_mov_v_reg(s, ot, s->T0, op1);
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if (is_right) {
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switch (ot) {
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case MO_8:
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@ -2319,7 +2319,7 @@ static TCGv gen_lea_modrm_1(DisasContext *s, AddressParts a, bool is_vsib)
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ea = cpu_regs[a.base];
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}
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if (!ea) {
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if (TARGET_TB_PCREL && a.base == -2) {
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if (tb_cflags(s->base.tb) & CF_PCREL && a.base == -2) {
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/* With cpu_eip ~= pc_save, the expression is pc-relative. */
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tcg_gen_addi_tl(s->A0, cpu_eip, a.disp - s->pc_save);
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} else {
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@ -2867,7 +2867,7 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num)
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if (!CODE64(s)) {
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if (ot == MO_16) {
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mask = 0xffff;
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if (TARGET_TB_PCREL && CODE32(s)) {
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if (tb_cflags(s->base.tb) & CF_PCREL && CODE32(s)) {
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use_goto_tb = false;
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}
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} else {
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@ -2879,7 +2879,7 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num)
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gen_update_cc_op(s);
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set_cc_op(s, CC_OP_DYNAMIC);
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if (TARGET_TB_PCREL) {
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if (tb_cflags(s->base.tb) & CF_PCREL) {
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tcg_gen_addi_tl(cpu_eip, cpu_eip, new_pc - s->pc_save);
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/*
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* If we can prove the branch does not leave the page and we have
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@ -2896,13 +2896,13 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num)
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translator_use_goto_tb(&s->base, new_eip + s->cs_base)) {
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/* jump to same page: we can use a direct jump */
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tcg_gen_goto_tb(tb_num);
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if (!TARGET_TB_PCREL) {
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if (!(tb_cflags(s->base.tb) & CF_PCREL)) {
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tcg_gen_movi_tl(cpu_eip, new_eip);
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}
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tcg_gen_exit_tb(s->base.tb, tb_num);
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s->base.is_jmp = DISAS_NORETURN;
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} else {
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if (!TARGET_TB_PCREL) {
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if (!(tb_cflags(s->base.tb) & CF_PCREL)) {
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tcg_gen_movi_tl(cpu_eip, new_eip);
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}
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if (s->jmp_opt) {
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@ -7065,7 +7065,7 @@ static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
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target_ulong pc_arg = dc->base.pc_next;
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dc->prev_insn_end = tcg_last_op();
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if (TARGET_TB_PCREL) {
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if (tb_cflags(dcbase->tb) & CF_PCREL) {
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pc_arg -= dc->cs_base;
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pc_arg &= ~TARGET_PAGE_MASK;
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}
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