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target-arm: A64: Correct updates to FAR and ESR on exceptions

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Not all exception types update both FAR and ESR.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Greg Bellows <greg.bellows@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1411718914-6608-7-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Edgar E. Iglesias 2014-09-29 18:48:50 +01:00 committed by Peter Maydell
parent dfafd09088
commit 2dd081ae76
1 changed files with 3 additions and 4 deletions
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7
target-arm/helper-a64.c
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@ -466,18 +466,17 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
env->exception.syndrome);
}
env->cp15.esr_el[new_el] = env->exception.syndrome;
env->cp15.far_el[new_el] = env->exception.vaddress;
switch (cs->exception_index) {
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
env->cp15.far_el[new_el] = env->exception.vaddress;
qemu_log_mask(CPU_LOG_INT, "...with FAR 0x%" PRIx64 "\n",
env->cp15.far_el[new_el]);
break;
/* fall through */
case EXCP_BKPT:
case EXCP_UDEF:
case EXCP_SWI:
env->cp15.esr_el[new_el] = env->exception.syndrome;
break;
case EXCP_IRQ:
addr += 0x80;