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hw/isa/piix: Allow for optional PIC creation in PIIX3

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In the PC machine, the PIC is created in board code to allow it to be
virtualized with various virtualization techniques. So explicitly disable its
creation in the PC machine via a property which defaults to enabled. Once the
PIIX implementations are consolidated this default will keep Malta working
without further ado.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-21-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Bernhard Beschow 2023-10-07 14:38:28 +02:00 committed by Michael S. Tsirkin
parent 1697189977
commit 2d7630f5c7
3 changed files with 22 additions and 2 deletions
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2
hw/i386/pc_piix.c
View File

@ -268,6 +268,8 @@ static void pc_init1(MachineState *machine,
object_property_set_bool(OBJECT(pci_dev), "has-acpi",
x86_machine_is_acpi_enabled(x86ms),
&error_abort);
object_property_set_bool(OBJECT(pci_dev), "has-pic", false,
&error_abort);
qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
x86_machine_is_smm_enabled(x86ms),

21
hw/isa/piix.c
View File

@ -106,7 +106,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
}
}
static void piix4_request_i8259_irq(void *opaque, int irq, int level)
static void piix_request_i8259_irq(void *opaque, int irq, int level)
{
PIIX4State *s = opaque;
qemu_set_irq(s->cpu_intr, level);
@ -343,6 +343,22 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
memory_region_add_subregion_overlap(pci_address_space_io(dev),
PIIX_RCR_IOPORT, &d->rcr_mem, 1);
/* PIC */
if (d->has_pic) {
qemu_irq *i8259_out_irq = qemu_allocate_irqs(piix_request_i8259_irq, d,
1);
qemu_irq *i8259 = i8259_init(isa_bus, *i8259_out_irq);
size_t i;
for (i = 0; i < ISA_NUM_IRQS; i++) {
d->isa_irqs_in[i] = i8259[i];
}
g_free(i8259);
qdev_init_gpio_out_named(DEVICE(dev), &d->cpu_intr, "intr", 1);
}
isa_bus_register_input_irqs(isa_bus, d->isa_irqs_in);
i8257_dma_init(isa_bus, 0);
@ -419,6 +435,7 @@ static void pci_piix3_init(Object *obj)
static Property pci_piix3_props[] = {
DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0),
DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true),
DEFINE_PROP_BOOL("has-pic", PIIXState, has_pic, true),
DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true),
DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false),
DEFINE_PROP_END_OF_LIST(),
@ -514,7 +531,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
PIIX_RCR_IOPORT, &s->rcr_mem, 1);
/* initialize i8259 pic */
i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
i8259_out_irq = qemu_allocate_irqs(piix_request_i8259_irq, s, 1);
i8259 = i8259_init(isa_bus, *i8259_out_irq);
for (i = 0; i < ISA_NUM_IRQS; i++) {

1
include/hw/southbridge/piix.h
View File

@ -69,6 +69,7 @@ struct PIIXState {
MemoryRegion rcr_mem;
bool has_acpi;
bool has_pic;
bool has_usb;
bool smm_enabled;
};