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hw/rtc: Rename rtc_[get|set]_memory -> mc146818rtc_[get|set]_cmos_data

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rtc_get_memory() and rtc_set_memory() helpers only work with
TYPE_MC146818_RTC devices. 'memory' in their name refer to
the CMOS region. Rename them as mc146818rtc_get_cmos_data()
and mc146818rtc_set_cmos_data() to be explicit about what
they are doing.

Mechanical change doing:

  $ sed -i -e 's/rtc_set_memory/mc146818rtc_set_cmos_data/g' \
        $(git grep -wl rtc_set_memory)
  $ sed -i -e 's/rtc_get_memory/mc146818rtc_get_cmos_data/g' \
        $(git grep -wl rtc_get_memory)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230210233116.80311-4-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-02-11 00:18:53 +01:00
parent 55c86cb803
commit 2d4bd81e39
6 changed files with 51 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
hw/i386/microvm.c
View File

@ -63,8 +63,8 @@ static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s)
int val; int val;
val = MIN(x86ms->below_4g_mem_size / KiB, 640); val = MIN(x86ms->below_4g_mem_size / KiB, 640);
rtc_set_memory(s, 0x15, val); mc146818rtc_set_cmos_data(s, 0x15, val);
rtc_set_memory(s, 0x16, val >> 8); mc146818rtc_set_cmos_data(s, 0x16, val >> 8);
/* extended memory (next 64MiB) */ /* extended memory (next 64MiB) */
if (x86ms->below_4g_mem_size > 1 * MiB) { if (x86ms->below_4g_mem_size > 1 * MiB) {
val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
@ -74,10 +74,10 @@ static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s)
if (val > 65535) { if (val > 65535) {
val = 65535; val = 65535;
} }
rtc_set_memory(s, 0x17, val); mc146818rtc_set_cmos_data(s, 0x17, val);
rtc_set_memory(s, 0x18, val >> 8); mc146818rtc_set_cmos_data(s, 0x18, val >> 8);
rtc_set_memory(s, 0x30, val); mc146818rtc_set_cmos_data(s, 0x30, val);
rtc_set_memory(s, 0x31, val >> 8); mc146818rtc_set_cmos_data(s, 0x31, val >> 8);
/* memory between 16MiB and 4GiB */ /* memory between 16MiB and 4GiB */
if (x86ms->below_4g_mem_size > 16 * MiB) { if (x86ms->below_4g_mem_size > 16 * MiB) {
val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
@ -87,13 +87,13 @@ static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s)
if (val > 65535) { if (val > 65535) {
val = 65535; val = 65535;
} }
rtc_set_memory(s, 0x34, val); mc146818rtc_set_cmos_data(s, 0x34, val);
rtc_set_memory(s, 0x35, val >> 8); mc146818rtc_set_cmos_data(s, 0x35, val >> 8);
/* memory above 4GiB */ /* memory above 4GiB */
val = x86ms->above_4g_mem_size / 65536; val = x86ms->above_4g_mem_size / 65536;
rtc_set_memory(s, 0x5b, val); mc146818rtc_set_cmos_data(s, 0x5b, val);
rtc_set_memory(s, 0x5c, val >> 8); mc146818rtc_set_cmos_data(s, 0x5c, val >> 8);
rtc_set_memory(s, 0x5d, val >> 16); mc146818rtc_set_cmos_data(s, 0x5d, val >> 16);
} }
static void create_gpex(MicrovmMachineState *mms) static void create_gpex(MicrovmMachineState *mms)

58
hw/i386/pc.c
View File

@ -441,16 +441,16 @@ static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size)
static void cmos_init_hd(MC146818RtcState *s, int type_ofs, int info_ofs, static void cmos_init_hd(MC146818RtcState *s, int type_ofs, int info_ofs,
int16_t cylinders, int8_t heads, int8_t sectors) int16_t cylinders, int8_t heads, int8_t sectors)
{ {
rtc_set_memory(s, type_ofs, 47); mc146818rtc_set_cmos_data(s, type_ofs, 47);
rtc_set_memory(s, info_ofs, cylinders); mc146818rtc_set_cmos_data(s, info_ofs, cylinders);
rtc_set_memory(s, info_ofs + 1, cylinders >> 8); mc146818rtc_set_cmos_data(s, info_ofs + 1, cylinders >> 8);
rtc_set_memory(s, info_ofs + 2, heads); mc146818rtc_set_cmos_data(s, info_ofs + 2, heads);
rtc_set_memory(s, info_ofs + 3, 0xff); mc146818rtc_set_cmos_data(s, info_ofs + 3, 0xff);
rtc_set_memory(s, info_ofs + 4, 0xff); mc146818rtc_set_cmos_data(s, info_ofs + 4, 0xff);
rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); mc146818rtc_set_cmos_data(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
rtc_set_memory(s, info_ofs + 6, cylinders); mc146818rtc_set_cmos_data(s, info_ofs + 6, cylinders);
rtc_set_memory(s, info_ofs + 7, cylinders >> 8); mc146818rtc_set_cmos_data(s, info_ofs + 7, cylinders >> 8);
rtc_set_memory(s, info_ofs + 8, sectors); mc146818rtc_set_cmos_data(s, info_ofs + 8, sectors);
} }
/* convert boot_device letter to something recognizable by the bios */ /* convert boot_device letter to something recognizable by the bios */
@ -490,8 +490,8 @@ static void set_boot_dev(MC146818RtcState *s, const char *boot_device,
return; return;
} }
} }
rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); mc146818rtc_set_cmos_data(s, 0x3d, (bds[1] << 4) | bds[0]);
rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); mc146818rtc_set_cmos_data(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
} }
static void pc_boot_set(void *opaque, const char *boot_device, Error **errp) static void pc_boot_set(void *opaque, const char *boot_device, Error **errp)
@ -513,9 +513,9 @@ static void pc_cmos_init_floppy(MC146818RtcState *rtc_state, ISADevice *floppy)
} }
val = (cmos_get_fd_drive_type(fd_type[0]) << 4) | val = (cmos_get_fd_drive_type(fd_type[0]) << 4) |
cmos_get_fd_drive_type(fd_type[1]); cmos_get_fd_drive_type(fd_type[1]);
rtc_set_memory(rtc_state, 0x10, val); mc146818rtc_set_cmos_data(rtc_state, 0x10, val);
val = rtc_get_memory(rtc_state, REG_EQUIPMENT_BYTE); val = mc146818rtc_get_cmos_data(rtc_state, REG_EQUIPMENT_BYTE);
nb = 0; nb = 0;
if (fd_type[0] != FLOPPY_DRIVE_TYPE_NONE) { if (fd_type[0] != FLOPPY_DRIVE_TYPE_NONE) {
nb++; nb++;
@ -533,7 +533,7 @@ static void pc_cmos_init_floppy(MC146818RtcState *rtc_state, ISADevice *floppy)
val |= 0x41; /* 2 drives, ready for boot */ val |= 0x41; /* 2 drives, ready for boot */
break; break;
} }
rtc_set_memory(rtc_state, REG_EQUIPMENT_BYTE, val); mc146818rtc_set_cmos_data(rtc_state, REG_EQUIPMENT_BYTE, val);
} }
typedef struct pc_cmos_init_late_arg { typedef struct pc_cmos_init_late_arg {
@ -621,7 +621,7 @@ static void pc_cmos_init_late(void *opaque)
cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors); cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
val |= 0x0f; val |= 0x0f;
} }
rtc_set_memory(s, 0x12, val); mc146818rtc_set_cmos_data(s, 0x12, val);
val = 0; val = 0;
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
@ -637,7 +637,7 @@ static void pc_cmos_init_late(void *opaque)
val |= trans << (i * 2); val |= trans << (i * 2);
} }
} }
rtc_set_memory(s, 0x39, val); mc146818rtc_set_cmos_data(s, 0x39, val);
pc_cmos_init_floppy(s, pc_find_fdc0()); pc_cmos_init_floppy(s, pc_find_fdc0());
@ -658,8 +658,8 @@ void pc_cmos_init(PCMachineState *pcms,
/* memory size */ /* memory size */
/* base memory (first MiB) */ /* base memory (first MiB) */
val = MIN(x86ms->below_4g_mem_size / KiB, 640); val = MIN(x86ms->below_4g_mem_size / KiB, 640);
rtc_set_memory(s, 0x15, val); mc146818rtc_set_cmos_data(s, 0x15, val);
rtc_set_memory(s, 0x16, val >> 8); mc146818rtc_set_cmos_data(s, 0x16, val >> 8);
/* extended memory (next 64MiB) */ /* extended memory (next 64MiB) */
if (x86ms->below_4g_mem_size > 1 * MiB) { if (x86ms->below_4g_mem_size > 1 * MiB) {
val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
@ -668,10 +668,10 @@ void pc_cmos_init(PCMachineState *pcms,
} }
if (val > 65535) if (val > 65535)
val = 65535; val = 65535;
rtc_set_memory(s, 0x17, val); mc146818rtc_set_cmos_data(s, 0x17, val);
rtc_set_memory(s, 0x18, val >> 8); mc146818rtc_set_cmos_data(s, 0x18, val >> 8);
rtc_set_memory(s, 0x30, val); mc146818rtc_set_cmos_data(s, 0x30, val);
rtc_set_memory(s, 0x31, val >> 8); mc146818rtc_set_cmos_data(s, 0x31, val >> 8);
/* memory between 16MiB and 4GiB */ /* memory between 16MiB and 4GiB */
if (x86ms->below_4g_mem_size > 16 * MiB) { if (x86ms->below_4g_mem_size > 16 * MiB) {
val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
@ -680,13 +680,13 @@ void pc_cmos_init(PCMachineState *pcms,
} }
if (val > 65535) if (val > 65535)
val = 65535; val = 65535;
rtc_set_memory(s, 0x34, val); mc146818rtc_set_cmos_data(s, 0x34, val);
rtc_set_memory(s, 0x35, val >> 8); mc146818rtc_set_cmos_data(s, 0x35, val >> 8);
/* memory above 4GiB */ /* memory above 4GiB */
val = x86ms->above_4g_mem_size / 65536; val = x86ms->above_4g_mem_size / 65536;
rtc_set_memory(s, 0x5b, val); mc146818rtc_set_cmos_data(s, 0x5b, val);
rtc_set_memory(s, 0x5c, val >> 8); mc146818rtc_set_cmos_data(s, 0x5c, val >> 8);
rtc_set_memory(s, 0x5d, val >> 16); mc146818rtc_set_cmos_data(s, 0x5d, val >> 16);
object_property_add_link(OBJECT(pcms), "rtc_state", object_property_add_link(OBJECT(pcms), "rtc_state",
TYPE_ISA_DEVICE, TYPE_ISA_DEVICE,
@ -701,7 +701,7 @@ void pc_cmos_init(PCMachineState *pcms,
val = 0; val = 0;
val |= 0x02; /* FPU is there */ val |= 0x02; /* FPU is there */
val |= 0x04; /* PS/2 mouse installed */ val |= 0x04; /* PS/2 mouse installed */
rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); mc146818rtc_set_cmos_data(s, REG_EQUIPMENT_BYTE, val);
/* hard drives and FDC */ /* hard drives and FDC */
arg.rtc_state = s; arg.rtc_state = s;

4
hw/i386/x86.c
View File

@ -160,9 +160,9 @@ void x86_rtc_set_cpus_count(ISADevice *s, uint16_t cpus_count)
* BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just
* to make old BIOSes fail more predictably. * to make old BIOSes fail more predictably.
*/ */
rtc_set_memory(rtc, 0x5f, 0); mc146818rtc_set_cmos_data(rtc, 0x5f, 0);
} else { } else {
rtc_set_memory(rtc, 0x5f, cpus_count - 1); mc146818rtc_set_cmos_data(rtc, 0x5f, cpus_count - 1);
} }
} }

8
hw/ppc/prep.c
View File

@ -215,10 +215,10 @@ static int prep_set_cmos_checksum(DeviceState *dev, void *opaque)
if (object_dynamic_cast(OBJECT(dev), TYPE_MC146818_RTC)) { if (object_dynamic_cast(OBJECT(dev), TYPE_MC146818_RTC)) {
MC146818RtcState *rtc = MC146818_RTC(dev); MC146818RtcState *rtc = MC146818_RTC(dev);
rtc_set_memory(rtc, 0x2e, checksum & 0xff); mc146818rtc_set_cmos_data(rtc, 0x2e, checksum & 0xff);
rtc_set_memory(rtc, 0x3e, checksum & 0xff); mc146818rtc_set_cmos_data(rtc, 0x3e, checksum & 0xff);
rtc_set_memory(rtc, 0x2f, checksum >> 8); mc146818rtc_set_cmos_data(rtc, 0x2f, checksum >> 8);
rtc_set_memory(rtc, 0x3f, checksum >> 8); mc146818rtc_set_cmos_data(rtc, 0x3f, checksum >> 8);
object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(rtc), object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(rtc),
"date"); "date");

6
hw/rtc/mc146818rtc.c
View File

@ -739,13 +739,13 @@ static uint64_t cmos_ioport_read(void *opaque, hwaddr addr,
} }
} }
void rtc_set_memory(MC146818RtcState *s, int addr, int val) void mc146818rtc_set_cmos_data(MC146818RtcState *s, int addr, int val)
{ {
if (addr >= 0 && addr <= 127) if (addr >= 0 && addr <= 127)
s->cmos_data[addr] = val; s->cmos_data[addr] = val;
} }
int rtc_get_memory(MC146818RtcState *s, int addr) int mc146818rtc_get_cmos_data(MC146818RtcState *s, int addr)
{ {
assert(addr >= 0 && addr <= 127); assert(addr >= 0 && addr <= 127);
return s->cmos_data[addr]; return s->cmos_data[addr];
@ -857,7 +857,7 @@ static void rtc_notify_suspend(Notifier *notifier, void *data)
{ {
MC146818RtcState *s = container_of(notifier, MC146818RtcState, MC146818RtcState *s = container_of(notifier, MC146818RtcState,
suspend_notifier); suspend_notifier);
rtc_set_memory(s, 0xF, 0xFE); mc146818rtc_set_cmos_data(s, 0xF, 0xFE);
} }
static const MemoryRegionOps cmos_ops = { static const MemoryRegionOps cmos_ops = {

4
include/hw/rtc/mc146818rtc.h
View File

@ -53,8 +53,8 @@ struct MC146818RtcState {
MC146818RtcState *mc146818_rtc_init(ISABus *bus, int base_year, MC146818RtcState *mc146818_rtc_init(ISABus *bus, int base_year,
qemu_irq intercept_irq); qemu_irq intercept_irq);
void rtc_set_memory(MC146818RtcState *s, int addr, int val); void mc146818rtc_set_cmos_data(MC146818RtcState *s, int addr, int val);
int rtc_get_memory(MC146818RtcState *s, int addr); int mc146818rtc_get_cmos_data(MC146818RtcState *s, int addr);
void qmp_rtc_reset_reinjection(Error **errp); void qmp_rtc_reset_reinjection(Error **errp);
#endif /* HW_RTC_MC146818RTC_H */ #endif /* HW_RTC_MC146818RTC_H */