hw/char: remove legacy interface escc_init()
Move necessary stuff in escc.h and update type names. Remove slavio_serial_ms_kbd_init(). Fix code style problems reported by checkpatch.pl Update mac_newworld, mac_oldworld and sun4m to use directly the QDEV interface. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Laurent Vivier
David Gibson
parent
9478956794
commit
2cc75c32e6
209
hw/char/escc.c
209
hw/char/escc.c
@ -26,10 +26,7 @@
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#include "hw/hw.h"
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#include "hw/sysbus.h"
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#include "hw/char/escc.h"
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#include "chardev/char-fe.h"
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#include "chardev/char-serial.h"
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#include "ui/console.h"
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#include "ui/input.h"
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#include "trace.h"
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/*
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@ -64,53 +61,7 @@
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* 2010-May-23 Artyom Tarasenko: Reworked IUS logic
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*/
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typedef enum {
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chn_a, chn_b,
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} ChnID;
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#define CHN_C(s) ((s)->chn == chn_b? 'b' : 'a')
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typedef enum {
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ser, kbd, mouse,
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} ChnType;
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#define SERIO_QUEUE_SIZE 256
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typedef struct {
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uint8_t data[SERIO_QUEUE_SIZE];
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int rptr, wptr, count;
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} SERIOQueue;
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#define SERIAL_REGS 16
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typedef struct ChannelState {
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qemu_irq irq;
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uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
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struct ChannelState *otherchn;
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uint32_t reg;
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uint8_t wregs[SERIAL_REGS], rregs[SERIAL_REGS];
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SERIOQueue queue;
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CharBackend chr;
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int e0_mode, led_mode, caps_lock_mode, num_lock_mode;
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int disabled;
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int clock;
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uint32_t vmstate_dummy;
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ChnID chn; // this channel, A (base+4) or B (base+0)
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ChnType type;
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uint8_t rx, tx;
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QemuInputHandlerState *hs;
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} ChannelState;
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#define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC)
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typedef struct ESCCState {
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SysBusDevice parent_obj;
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struct ChannelState chn[2];
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uint32_t it_shift;
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MemoryRegion mmio;
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uint32_t disabled;
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uint32_t frequency;
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} ESCCState;
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#define CHN_C(s) ((s)->chn == escc_chn_b ? 'b' : 'a')
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#define SERIAL_CTRL 0
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#define SERIAL_DATA 1
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@ -214,44 +165,47 @@ typedef struct ESCCState {
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#define R_MISC1I 14
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#define R_EXTINT 15
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static void handle_kbd_command(ChannelState *s, int val);
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static void handle_kbd_command(ESCCChannelState *s, int val);
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static int serial_can_receive(void *opaque);
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static void serial_receive_byte(ChannelState *s, int ch);
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static void serial_receive_byte(ESCCChannelState *s, int ch);
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static void clear_queue(void *opaque)
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{
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ChannelState *s = opaque;
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SERIOQueue *q = &s->queue;
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ESCCChannelState *s = opaque;
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ESCCSERIOQueue *q = &s->queue;
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q->rptr = q->wptr = q->count = 0;
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}
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static void put_queue(void *opaque, int b)
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{
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ChannelState *s = opaque;
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SERIOQueue *q = &s->queue;
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ESCCChannelState *s = opaque;
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ESCCSERIOQueue *q = &s->queue;
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trace_escc_put_queue(CHN_C(s), b);
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if (q->count >= SERIO_QUEUE_SIZE)
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if (q->count >= ESCC_SERIO_QUEUE_SIZE) {
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return;
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}
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q->data[q->wptr] = b;
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if (++q->wptr == SERIO_QUEUE_SIZE)
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if (++q->wptr == ESCC_SERIO_QUEUE_SIZE) {
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q->wptr = 0;
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}
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q->count++;
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serial_receive_byte(s, 0);
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}
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static uint32_t get_queue(void *opaque)
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{
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ChannelState *s = opaque;
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SERIOQueue *q = &s->queue;
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ESCCChannelState *s = opaque;
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ESCCSERIOQueue *q = &s->queue;
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int val;
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if (q->count == 0) {
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return 0;
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} else {
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val = q->data[q->rptr];
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if (++q->rptr == SERIO_QUEUE_SIZE)
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if (++q->rptr == ESCC_SERIO_QUEUE_SIZE) {
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q->rptr = 0;
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}
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q->count--;
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}
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trace_escc_get_queue(CHN_C(s), val);
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@ -260,7 +214,7 @@ static uint32_t get_queue(void *opaque)
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return val;
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}
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static int escc_update_irq_chn(ChannelState *s)
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static int escc_update_irq_chn(ESCCChannelState *s)
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{
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if ((((s->wregs[W_INTR] & INTR_TXINT) && (s->txint == 1)) ||
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// tx ints enabled, pending
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@ -274,7 +228,7 @@ static int escc_update_irq_chn(ChannelState *s)
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return 0;
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}
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static void escc_update_irq(ChannelState *s)
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static void escc_update_irq(ESCCChannelState *s)
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{
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int irq;
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@ -285,12 +239,12 @@ static void escc_update_irq(ChannelState *s)
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qemu_set_irq(s->irq, irq);
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}
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static void escc_reset_chn(ChannelState *s)
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static void escc_reset_chn(ESCCChannelState *s)
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{
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int i;
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s->reg = 0;
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for (i = 0; i < SERIAL_REGS; i++) {
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for (i = 0; i < ESCC_SERIAL_REGS; i++) {
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s->rregs[i] = 0;
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s->wregs[i] = 0;
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}
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@ -322,13 +276,13 @@ static void escc_reset(DeviceState *d)
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escc_reset_chn(&s->chn[1]);
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}
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static inline void set_rxint(ChannelState *s)
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static inline void set_rxint(ESCCChannelState *s)
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{
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s->rxint = 1;
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/* XXX: missing daisy chainnig: chn_b rx should have a lower priority
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/* XXX: missing daisy chainnig: escc_chn_b rx should have a lower priority
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than chn_a rx/tx/special_condition service*/
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s->rxint_under_svc = 1;
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if (s->chn == chn_a) {
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if (s->chn == escc_chn_a) {
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s->rregs[R_INTR] |= INTR_RXINTA;
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if (s->wregs[W_MINTR] & MINTR_STATUSHI)
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s->otherchn->rregs[R_IVEC] = IVEC_HIRXINTA;
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@ -344,12 +298,12 @@ static inline void set_rxint(ChannelState *s)
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escc_update_irq(s);
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}
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static inline void set_txint(ChannelState *s)
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static inline void set_txint(ESCCChannelState *s)
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{
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s->txint = 1;
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if (!s->rxint_under_svc) {
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s->txint_under_svc = 1;
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if (s->chn == chn_a) {
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if (s->chn == escc_chn_a) {
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if (s->wregs[W_INTR] & INTR_TXINT) {
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s->rregs[R_INTR] |= INTR_TXINTA;
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}
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@ -367,11 +321,11 @@ static inline void set_txint(ChannelState *s)
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}
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}
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static inline void clr_rxint(ChannelState *s)
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static inline void clr_rxint(ESCCChannelState *s)
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{
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s->rxint = 0;
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s->rxint_under_svc = 0;
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if (s->chn == chn_a) {
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if (s->chn == escc_chn_a) {
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if (s->wregs[W_MINTR] & MINTR_STATUSHI)
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s->otherchn->rregs[R_IVEC] = IVEC_HINOINT;
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else
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@ -389,11 +343,11 @@ static inline void clr_rxint(ChannelState *s)
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escc_update_irq(s);
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}
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static inline void clr_txint(ChannelState *s)
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static inline void clr_txint(ESCCChannelState *s)
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{
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s->txint = 0;
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s->txint_under_svc = 0;
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if (s->chn == chn_a) {
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if (s->chn == escc_chn_a) {
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if (s->wregs[W_MINTR] & MINTR_STATUSHI)
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s->otherchn->rregs[R_IVEC] = IVEC_HINOINT;
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else
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@ -412,12 +366,12 @@ static inline void clr_txint(ChannelState *s)
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escc_update_irq(s);
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}
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static void escc_update_parameters(ChannelState *s)
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static void escc_update_parameters(ESCCChannelState *s)
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{
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int speed, parity, data_bits, stop_bits;
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QEMUSerialSetParams ssp;
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if (!qemu_chr_fe_backend_connected(&s->chr) || s->type != ser)
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if (!qemu_chr_fe_backend_connected(&s->chr) || s->type != escc_serial)
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return;
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if (s->wregs[W_TXCTRL1] & TXCTRL1_PAREN) {
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@ -474,7 +428,7 @@ static void escc_mem_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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ESCCState *serial = opaque;
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ChannelState *s;
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ESCCChannelState *s;
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uint32_t saddr;
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int newreg, channel;
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@ -561,7 +515,7 @@ static void escc_mem_write(void *opaque, hwaddr addr,
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/* XXX this blocks entire thread. Rewrite to use
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* qemu_chr_fe_write and background I/O callbacks */
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qemu_chr_fe_write_all(&s->chr, &s->tx, 1);
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} else if (s->type == kbd && !s->disabled) {
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} else if (s->type == escc_kbd && !s->disabled) {
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handle_kbd_command(s, val);
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}
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}
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@ -578,7 +532,7 @@ static uint64_t escc_mem_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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ESCCState *serial = opaque;
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ChannelState *s;
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ESCCChannelState *s;
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uint32_t saddr;
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uint32_t ret;
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int channel;
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@ -595,10 +549,11 @@ static uint64_t escc_mem_read(void *opaque, hwaddr addr,
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case SERIAL_DATA:
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s->rregs[R_STATUS] &= ~STATUS_RXAV;
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clr_rxint(s);
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if (s->type == kbd || s->type == mouse)
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if (s->type == escc_kbd || s->type == escc_mouse) {
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ret = get_queue(s);
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else
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} else {
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ret = s->rx;
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}
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trace_escc_mem_readb_data(CHN_C(s), ret);
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qemu_chr_fe_accept_input(&s->chr);
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return ret;
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@ -620,7 +575,7 @@ static const MemoryRegionOps escc_mem_ops = {
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static int serial_can_receive(void *opaque)
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{
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ChannelState *s = opaque;
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ESCCChannelState *s = opaque;
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int ret;
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if (((s->wregs[W_RXCTRL] & RXCTRL_RXEN) == 0) // Rx not enabled
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@ -632,7 +587,7 @@ static int serial_can_receive(void *opaque)
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return ret;
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}
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static void serial_receive_byte(ChannelState *s, int ch)
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static void serial_receive_byte(ESCCChannelState *s, int ch)
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{
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trace_escc_serial_receive_byte(CHN_C(s), ch);
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s->rregs[R_STATUS] |= STATUS_RXAV;
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@ -640,7 +595,7 @@ static void serial_receive_byte(ChannelState *s, int ch)
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set_rxint(s);
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}
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static void serial_receive_break(ChannelState *s)
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static void serial_receive_break(ESCCChannelState *s)
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{
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s->rregs[R_STATUS] |= STATUS_BRK;
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escc_update_irq(s);
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@ -648,13 +603,13 @@ static void serial_receive_break(ChannelState *s)
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static void serial_receive1(void *opaque, const uint8_t *buf, int size)
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{
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ChannelState *s = opaque;
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ESCCChannelState *s = opaque;
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serial_receive_byte(s, buf[0]);
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}
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static void serial_event(void *opaque, int event)
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{
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ChannelState *s = opaque;
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ESCCChannelState *s = opaque;
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if (event == CHR_EVENT_BREAK)
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serial_receive_break(s);
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}
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@ -664,16 +619,16 @@ static const VMStateDescription vmstate_escc_chn = {
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.version_id = 2,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(vmstate_dummy, ChannelState),
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VMSTATE_UINT32(reg, ChannelState),
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VMSTATE_UINT32(rxint, ChannelState),
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VMSTATE_UINT32(txint, ChannelState),
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VMSTATE_UINT32(rxint_under_svc, ChannelState),
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VMSTATE_UINT32(txint_under_svc, ChannelState),
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VMSTATE_UINT8(rx, ChannelState),
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VMSTATE_UINT8(tx, ChannelState),
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VMSTATE_BUFFER(wregs, ChannelState),
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VMSTATE_BUFFER(rregs, ChannelState),
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VMSTATE_UINT32(vmstate_dummy, ESCCChannelState),
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VMSTATE_UINT32(reg, ESCCChannelState),
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VMSTATE_UINT32(rxint, ESCCChannelState),
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VMSTATE_UINT32(txint, ESCCChannelState),
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VMSTATE_UINT32(rxint_under_svc, ESCCChannelState),
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VMSTATE_UINT32(txint_under_svc, ESCCChannelState),
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VMSTATE_UINT8(rx, ESCCChannelState),
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VMSTATE_UINT8(tx, ESCCChannelState),
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VMSTATE_BUFFER(wregs, ESCCChannelState),
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VMSTATE_BUFFER(rregs, ESCCChannelState),
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VMSTATE_END_OF_LIST()
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}
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};
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@ -684,44 +639,15 @@ static const VMStateDescription vmstate_escc = {
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_STRUCT_ARRAY(chn, ESCCState, 2, 2, vmstate_escc_chn,
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ChannelState),
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ESCCChannelState),
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VMSTATE_END_OF_LIST()
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}
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};
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MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
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Chardev *chrA, Chardev *chrB,
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int clock, int it_shift)
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{
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DeviceState *dev;
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SysBusDevice *s;
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ESCCState *d;
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dev = qdev_create(NULL, TYPE_ESCC);
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qdev_prop_set_uint32(dev, "disabled", 0);
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qdev_prop_set_uint32(dev, "frequency", clock);
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qdev_prop_set_uint32(dev, "it_shift", it_shift);
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qdev_prop_set_chr(dev, "chrB", chrB);
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qdev_prop_set_chr(dev, "chrA", chrA);
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qdev_prop_set_uint32(dev, "chnBtype", ser);
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qdev_prop_set_uint32(dev, "chnAtype", ser);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_connect_irq(s, 0, irqB);
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sysbus_connect_irq(s, 1, irqA);
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if (base) {
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sysbus_mmio_map(s, 0, base);
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}
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d = ESCC(s);
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return &d->mmio;
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}
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static void sunkbd_handle_event(DeviceState *dev, QemuConsole *src,
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InputEvent *evt)
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{
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ChannelState *s = (ChannelState *)dev;
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ESCCChannelState *s = (ESCCChannelState *)dev;
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int qcode, keycode;
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InputKeyEvent *key;
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@ -777,7 +703,7 @@ static QemuInputHandler sunkbd_handler = {
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.event = sunkbd_handle_event,
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};
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static void handle_kbd_command(ChannelState *s, int val)
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static void handle_kbd_command(ESCCChannelState *s, int val)
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{
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trace_escc_kbd_command(val);
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if (s->led_mode) { // Ignore led byte
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@ -808,7 +734,7 @@ static void handle_kbd_command(ChannelState *s, int val)
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static void sunmouse_event(void *opaque,
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int dx, int dy, int dz, int buttons_state)
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{
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ChannelState *s = opaque;
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ESCCChannelState *s = opaque;
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int ch;
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trace_escc_sunmouse_event(dx, dy, buttons_state);
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@ -847,27 +773,6 @@ static void sunmouse_event(void *opaque,
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put_queue(s, 0);
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}
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void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq,
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int disabled, int clock, int it_shift)
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{
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DeviceState *dev;
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SysBusDevice *s;
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dev = qdev_create(NULL, TYPE_ESCC);
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qdev_prop_set_uint32(dev, "disabled", disabled);
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qdev_prop_set_uint32(dev, "frequency", clock);
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qdev_prop_set_uint32(dev, "it_shift", it_shift);
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qdev_prop_set_chr(dev, "chrB", NULL);
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qdev_prop_set_chr(dev, "chrA", NULL);
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qdev_prop_set_uint32(dev, "chnBtype", mouse);
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qdev_prop_set_uint32(dev, "chnAtype", kbd);
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||||
qdev_init_nofail(dev);
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
sysbus_connect_irq(s, 0, irq);
|
||||
sysbus_connect_irq(s, 1, irq);
|
||||
sysbus_mmio_map(s, 0, base);
|
||||
}
|
||||
|
||||
static void escc_init1(Object *obj)
|
||||
{
|
||||
ESCCState *s = ESCC(obj);
|
||||
@ -904,11 +809,11 @@ static void escc_realize(DeviceState *dev, Error **errp)
|
||||
}
|
||||
}
|
||||
|
||||
if (s->chn[0].type == mouse) {
|
||||
if (s->chn[0].type == escc_mouse) {
|
||||
qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0,
|
||||
"QEMU Sun Mouse");
|
||||
}
|
||||
if (s->chn[1].type == kbd) {
|
||||
if (s->chn[1].type == escc_kbd) {
|
||||
s->chn[1].hs = qemu_input_handler_register((DeviceState *)(&s->chn[1]),
|
||||
&sunkbd_handler);
|
||||
}
|
||||
|
||||
@ -369,8 +369,23 @@ static void ppc_core99_init(MachineState *machine)
|
||||
}
|
||||
|
||||
/* init basic PC hardware */
|
||||
escc_mem = escc_init(0, pic[0x25], pic[0x24],
|
||||
serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
|
||||
|
||||
dev = qdev_create(NULL, TYPE_ESCC);
|
||||
qdev_prop_set_uint32(dev, "disabled", 0);
|
||||
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
|
||||
qdev_prop_set_uint32(dev, "it_shift", 4);
|
||||
qdev_prop_set_chr(dev, "chrA", serial_hds[0]);
|
||||
qdev_prop_set_chr(dev, "chrB", serial_hds[1]);
|
||||
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
|
||||
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
|
||||
qdev_init_nofail(dev);
|
||||
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
sysbus_connect_irq(s, 0, pic[0x24]);
|
||||
sysbus_connect_irq(s, 1, pic[0x25]);
|
||||
|
||||
escc_mem = &ESCC(s)->mmio;
|
||||
|
||||
memory_region_init_alias(escc_bar, NULL, "escc-bar",
|
||||
escc_mem, 0, memory_region_size(escc_mem));
|
||||
|
||||
|
||||
@ -104,6 +104,7 @@ static void ppc_heathrow_init(MachineState *machine)
|
||||
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
|
||||
void *fw_cfg;
|
||||
uint64_t tbfreq;
|
||||
SysBusDevice *s;
|
||||
|
||||
linux_boot = (kernel_filename != NULL);
|
||||
|
||||
@ -264,8 +265,22 @@ static void ppc_heathrow_init(MachineState *machine)
|
||||
get_system_io());
|
||||
pci_vga_init(pci_bus);
|
||||
|
||||
escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
|
||||
serial_hds[1], ESCC_CLOCK, 4);
|
||||
dev = qdev_create(NULL, TYPE_ESCC);
|
||||
qdev_prop_set_uint32(dev, "disabled", 0);
|
||||
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
|
||||
qdev_prop_set_uint32(dev, "it_shift", 4);
|
||||
qdev_prop_set_chr(dev, "chrA", serial_hds[0]);
|
||||
qdev_prop_set_chr(dev, "chrB", serial_hds[1]);
|
||||
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
|
||||
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
|
||||
qdev_init_nofail(dev);
|
||||
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
sysbus_connect_irq(s, 0, pic[0x10]);
|
||||
sysbus_connect_irq(s, 1, pic[0x0f]);
|
||||
|
||||
escc_mem = &ESCC(s)->mmio;
|
||||
|
||||
memory_region_init_alias(escc_bar, NULL, "escc-bar",
|
||||
escc_mem, 0, memory_region_size(escc_mem));
|
||||
|
||||
|
||||
@ -818,6 +818,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
|
||||
DriveInfo *fd[MAX_FD];
|
||||
FWCfgState *fw_cfg;
|
||||
unsigned int num_vsimms;
|
||||
DeviceState *dev;
|
||||
SysBusDevice *s;
|
||||
|
||||
/* init CPUs */
|
||||
for(i = 0; i < smp_cpus; i++) {
|
||||
@ -925,12 +927,36 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
|
||||
|
||||
slavio_timer_init_all(hwdef->counter_base, slavio_irq[19], slavio_cpu_irq, smp_cpus);
|
||||
|
||||
slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[14],
|
||||
!machine->enable_graphics, ESCC_CLOCK, 1);
|
||||
/* Slavio TTYA (base+4, Linux ttyS0) is the first QEMU serial device
|
||||
Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device */
|
||||
escc_init(hwdef->serial_base, slavio_irq[15], slavio_irq[15],
|
||||
serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
|
||||
dev = qdev_create(NULL, TYPE_ESCC);
|
||||
qdev_prop_set_uint32(dev, "disabled", !machine->enable_graphics);
|
||||
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
|
||||
qdev_prop_set_uint32(dev, "it_shift", 1);
|
||||
qdev_prop_set_chr(dev, "chrB", NULL);
|
||||
qdev_prop_set_chr(dev, "chrA", NULL);
|
||||
qdev_prop_set_uint32(dev, "chnBtype", escc_mouse);
|
||||
qdev_prop_set_uint32(dev, "chnAtype", escc_kbd);
|
||||
qdev_init_nofail(dev);
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
sysbus_connect_irq(s, 0, slavio_irq[14]);
|
||||
sysbus_connect_irq(s, 1, slavio_irq[14]);
|
||||
sysbus_mmio_map(s, 0, hwdef->ms_kb_base);
|
||||
|
||||
dev = qdev_create(NULL, TYPE_ESCC);
|
||||
qdev_prop_set_uint32(dev, "disabled", 0);
|
||||
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
|
||||
qdev_prop_set_uint32(dev, "it_shift", 1);
|
||||
qdev_prop_set_chr(dev, "chrB", serial_hds[1]);
|
||||
qdev_prop_set_chr(dev, "chrA", serial_hds[0]);
|
||||
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
|
||||
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
|
||||
qdev_init_nofail(dev);
|
||||
|
||||
s = SYS_BUS_DEVICE(dev);
|
||||
sysbus_connect_irq(s, 0, slavio_irq[15]);
|
||||
sysbus_connect_irq(s, 1, slavio_irq[15]);
|
||||
sysbus_mmio_map(s, 0, hwdef->serial_base);
|
||||
|
||||
if (hwdef->apc_base) {
|
||||
apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0));
|
||||
|
||||
@ -1,14 +1,58 @@
|
||||
#ifndef HW_ESCC_H
|
||||
#define HW_ESCC_H
|
||||
|
||||
#include "chardev/char-fe.h"
|
||||
#include "chardev/char-serial.h"
|
||||
#include "ui/input.h"
|
||||
|
||||
/* escc.c */
|
||||
#define TYPE_ESCC "escc"
|
||||
#define ESCC_SIZE 4
|
||||
MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
|
||||
Chardev *chrA, Chardev *chrB,
|
||||
int clock, int it_shift);
|
||||
|
||||
void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq,
|
||||
int disabled, int clock, int it_shift);
|
||||
#define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC)
|
||||
|
||||
typedef enum {
|
||||
escc_chn_a, escc_chn_b,
|
||||
} ESCCChnID;
|
||||
|
||||
typedef enum {
|
||||
escc_serial, escc_kbd, escc_mouse,
|
||||
} ESCCChnType;
|
||||
|
||||
#define ESCC_SERIO_QUEUE_SIZE 256
|
||||
|
||||
typedef struct {
|
||||
uint8_t data[ESCC_SERIO_QUEUE_SIZE];
|
||||
int rptr, wptr, count;
|
||||
} ESCCSERIOQueue;
|
||||
|
||||
#define ESCC_SERIAL_REGS 16
|
||||
typedef struct ESCCChannelState {
|
||||
qemu_irq irq;
|
||||
uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
|
||||
struct ESCCChannelState *otherchn;
|
||||
uint32_t reg;
|
||||
uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS];
|
||||
ESCCSERIOQueue queue;
|
||||
CharBackend chr;
|
||||
int e0_mode, led_mode, caps_lock_mode, num_lock_mode;
|
||||
int disabled;
|
||||
int clock;
|
||||
uint32_t vmstate_dummy;
|
||||
ESCCChnID chn; /* this channel, A (base+4) or B (base+0) */
|
||||
ESCCChnType type;
|
||||
uint8_t rx, tx;
|
||||
QemuInputHandlerState *hs;
|
||||
} ESCCChannelState;
|
||||
|
||||
typedef struct ESCCState {
|
||||
SysBusDevice parent_obj;
|
||||
|
||||
struct ESCCChannelState chn[2];
|
||||
uint32_t it_shift;
|
||||
MemoryRegion mmio;
|
||||
uint32_t disabled;
|
||||
uint32_t frequency;
|
||||
} ESCCState;
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user