iommu: Add IOMMU index argument to translate method
Add an IOMMU index argument to the translate method of IOMMUs. Since all of our current IOMMU implementations support only a single IOMMU index, this has no effect on the behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180604152941.20374-4-peter.maydell@linaro.org
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cb1efcf462
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2c91bcf273
11
exec.c
11
exec.c
@ -501,8 +501,15 @@ static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iomm
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do {
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do {
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hwaddr addr = *xlat;
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hwaddr addr = *xlat;
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IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
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IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
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IOMMUTLBEntry iotlb = imrc->translate(iommu_mr, addr, is_write ?
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int iommu_idx = 0;
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IOMMU_WO : IOMMU_RO);
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IOMMUTLBEntry iotlb;
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if (imrc->attrs_to_index) {
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iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
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}
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iotlb = imrc->translate(iommu_mr, addr, is_write ?
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IOMMU_WO : IOMMU_RO, iommu_idx);
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if (!(iotlb.perm & (1 << is_write))) {
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if (!(iotlb.perm & (1 << is_write))) {
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goto unassigned;
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goto unassigned;
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@ -666,7 +666,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr addr,
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Pchip and generate a machine check interrupt. */
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Pchip and generate a machine check interrupt. */
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static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu,
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static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu,
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hwaddr addr,
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hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag,
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int iommu_idx)
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{
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{
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TyphoonPchip *pchip = container_of(iommu, TyphoonPchip, iommu);
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TyphoonPchip *pchip = container_of(iommu, TyphoonPchip, iommu);
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IOMMUTLBEntry ret;
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IOMMUTLBEntry ret;
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@ -538,7 +538,7 @@ static int smmuv3_decode_config(IOMMUMemoryRegion *mr, SMMUTransCfg *cfg,
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}
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}
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static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
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static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag, int iommu_idx)
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{
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{
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SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
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SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
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SMMUv3State *s = sdev->smmu;
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SMMUv3State *s = sdev->smmu;
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@ -491,7 +491,7 @@ static const MemoryRegionOps jazzio_ops = {
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};
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};
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static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
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static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag, int iommu_idx)
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{
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{
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rc4030State *s = container_of(iommu, rc4030State, dma_mr);
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rc4030State *s = container_of(iommu, rc4030State, dma_mr);
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IOMMUTLBEntry ret = {
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IOMMUTLBEntry ret = {
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@ -991,7 +991,7 @@ static inline bool amdvi_is_interrupt_addr(hwaddr addr)
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}
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}
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static IOMMUTLBEntry amdvi_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
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static IOMMUTLBEntry amdvi_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag, int iommu_idx)
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{
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{
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AMDVIAddressSpace *as = container_of(iommu, AMDVIAddressSpace, iommu);
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AMDVIAddressSpace *as = container_of(iommu, AMDVIAddressSpace, iommu);
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AMDVIState *s = as->iommu_state;
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AMDVIState *s = as->iommu_state;
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@ -2471,7 +2471,7 @@ static void vtd_mem_write(void *opaque, hwaddr addr,
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}
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}
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static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
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static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag, int iommu_idx)
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{
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{
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VTDAddressSpace *vtd_as = container_of(iommu, VTDAddressSpace, iommu);
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VTDAddressSpace *vtd_as = container_of(iommu, VTDAddressSpace, iommu);
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IntelIOMMUState *s = vtd_as->iommu_state;
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IntelIOMMUState *s = vtd_as->iommu_state;
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@ -112,7 +112,8 @@ static void spapr_tce_free_table(uint64_t *table, int fd, uint32_t nb_table)
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/* Called from RCU critical section */
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/* Called from RCU critical section */
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static IOMMUTLBEntry spapr_tce_translate_iommu(IOMMUMemoryRegion *iommu,
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static IOMMUTLBEntry spapr_tce_translate_iommu(IOMMUMemoryRegion *iommu,
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hwaddr addr,
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hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag,
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int iommu_idx)
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{
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{
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sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
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sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
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uint64_t tce;
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uint64_t tce;
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@ -484,7 +484,7 @@ uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr,
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}
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}
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static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
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static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag, int iommu_idx)
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{
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{
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S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
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S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
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S390IOTLBEntry *entry;
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S390IOTLBEntry *entry;
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@ -282,7 +282,8 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr,
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/* Called from RCU critical section */
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/* Called from RCU critical section */
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static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu,
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static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu,
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hwaddr addr,
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hwaddr addr,
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IOMMUAccessFlags flags)
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IOMMUAccessFlags flags,
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int iommu_idx)
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{
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{
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IOMMUState *is = container_of(iommu, IOMMUState, iommu);
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IOMMUState *is = container_of(iommu, IOMMUState, iommu);
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hwaddr page, pa;
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hwaddr page, pa;
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@ -73,7 +73,7 @@
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/* Called from RCU critical section */
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/* Called from RCU critical section */
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static IOMMUTLBEntry sun4u_translate_iommu(IOMMUMemoryRegion *iommu,
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static IOMMUTLBEntry sun4u_translate_iommu(IOMMUMemoryRegion *iommu,
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hwaddr addr,
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hwaddr addr,
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IOMMUAccessFlags flag)
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IOMMUAccessFlags flag, int iommu_idx)
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{
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{
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IOMMUState *is = container_of(iommu, IOMMUState, iommu);
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IOMMUState *is = container_of(iommu, IOMMUState, iommu);
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hwaddr baseaddr, offset;
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hwaddr baseaddr, offset;
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@ -251,9 +251,10 @@ typedef struct IOMMUMemoryRegionClass {
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* @iommu: the IOMMUMemoryRegion
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* @iommu: the IOMMUMemoryRegion
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* @hwaddr: address to be translated within the memory region
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* @hwaddr: address to be translated within the memory region
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* @flag: requested access permissions
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* @flag: requested access permissions
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* @iommu_idx: IOMMU index for the translation
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*/
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*/
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IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr,
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IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr,
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IOMMUAccessFlags flag);
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IOMMUAccessFlags flag, int iommu_idx);
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/* Returns minimum supported page size in bytes.
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/* Returns minimum supported page size in bytes.
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* If this method is not provided then the minimum is assumed to
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* If this method is not provided then the minimum is assumed to
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* be TARGET_PAGE_SIZE.
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* be TARGET_PAGE_SIZE.
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2
memory.c
2
memory.c
@ -1832,7 +1832,7 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
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granularity = memory_region_iommu_get_min_page_size(iommu_mr);
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granularity = memory_region_iommu_get_min_page_size(iommu_mr);
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for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
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for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
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iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
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iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
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if (iotlb.perm != IOMMU_NONE) {
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if (iotlb.perm != IOMMU_NONE) {
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n->notify(n, &iotlb);
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n->notify(n, &iotlb);
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}
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}
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