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intc/arm_gic: Wire the vCPU interface 

Add the read/write functions to handle accesses to the vCPU interface.
Those accesses are forwarded to the real CPU interface, with the CPU id
being converted to the corresponding vCPU id (vCPU id = CPU id +
GIC_NCPU).

Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180727095421.386-15-luc.michel@greensocs.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel 2018-08-14 17:17:20 +01:00 committed by Peter Maydell
parent 7eb079ec51
commit 2c679ac734
1 changed files with 35 additions and 2 deletions
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37
hw/intc/arm_gic.c
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@ -1555,6 +1555,23 @@ static MemTxResult gic_do_cpu_write(void *opaque, hwaddr addr,
return gic_cpu_write(s, id, addr, value, attrs);
}
static MemTxResult gic_thisvcpu_read(void *opaque, hwaddr addr, uint64_t *data,
unsigned size, MemTxAttrs attrs)
{
GICState *s = (GICState *)opaque;
return gic_cpu_read(s, gic_get_current_vcpu(s), addr, data, attrs);
}
static MemTxResult gic_thisvcpu_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size,
MemTxAttrs attrs)
{
GICState *s = (GICState *)opaque;
return gic_cpu_write(s, gic_get_current_vcpu(s), addr, value, attrs);
}
static const MemoryRegionOps gic_ops[2] = {
{
.read_with_attrs = gic_dist_read,
@ -1574,6 +1591,19 @@ static const MemoryRegionOps gic_cpu_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
static const MemoryRegionOps gic_virt_ops[2] = {
{
.read_with_attrs = NULL,
.write_with_attrs = NULL,
.endianness = DEVICE_NATIVE_ENDIAN,
},
{
.read_with_attrs = gic_thisvcpu_read,
.write_with_attrs = gic_thisvcpu_write,
.endianness = DEVICE_NATIVE_ENDIAN,
}
};
static void arm_gic_realize(DeviceState *dev, Error **errp)
{
/* Device instance realize function for the GIC sysbus device */
@ -1595,8 +1625,11 @@ static void arm_gic_realize(DeviceState *dev, Error **errp)
return;
}
/* This creates distributor and main CPU interface (s->cpuiomem[0]) */
gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops, NULL);
/* This creates distributor, main CPU interface (s->cpuiomem[0]) and if
* enabled, virtualization extensions related interfaces (main virtual
* interface (s->vifaceiomem[0]) and virtual CPU interface).
*/
gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops, gic_virt_ops);
/* Extra core-specific regions for the CPU interfaces. This is
* necessary for "franken-GIC" implementations, for example on