Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_stores
Reducing the number of arguments reduces the overhead of the helper call Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230405164211.30015-2-tsimpson@quicinc.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -107,4 +107,4 @@ DEF_HELPER_2(vwhist128qm, void, env, s32)
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DEF_HELPER_4(probe_noshuf_load, void, env, i32, int, int)
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DEF_HELPER_2(probe_pkt_scalar_store_s0, void, env, int)
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DEF_HELPER_2(probe_hvx_stores, void, env, int)
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DEF_HELPER_3(probe_pkt_scalar_hvx_stores, void, env, int, int)
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DEF_HELPER_2(probe_pkt_scalar_hvx_stores, void, env, int)
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@ -488,8 +488,7 @@ void HELPER(probe_hvx_stores)(CPUHexagonState *env, int mmu_idx)
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}
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}
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void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask,
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int mmu_idx)
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void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask)
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{
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bool has_st0 = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST0);
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bool has_st1 = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1);
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@ -497,6 +496,7 @@ void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask,
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FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_HVX_STORES);
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bool s0_is_pred = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED);
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bool s1_is_pred = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED);
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int mmu_idx = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX);
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if (has_st0) {
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probe_store(env, 0, mmu_idx, s0_is_pred);
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@ -808,13 +808,11 @@ static void gen_commit_packet(DisasContext *ctx)
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g_assert(!has_store_s1 && !has_hvx_store);
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process_dczeroa(ctx);
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} else if (has_hvx_store) {
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TCGv mem_idx = tcg_constant_tl(ctx->mem_idx);
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if (!has_store_s0 && !has_store_s1) {
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TCGv mem_idx = tcg_constant_tl(ctx->mem_idx);
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gen_helper_probe_hvx_stores(cpu_env, mem_idx);
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} else {
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int mask = 0;
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TCGv mask_tcgv;
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if (has_store_s0) {
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mask =
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@ -839,8 +837,10 @@ static void gen_commit_packet(DisasContext *ctx)
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FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES,
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S1_IS_PRED, 1);
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}
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mask_tcgv = tcg_constant_tl(mask);
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gen_helper_probe_pkt_scalar_hvx_stores(cpu_env, mask_tcgv, mem_idx);
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mask = FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX,
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ctx->mem_idx);
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gen_helper_probe_pkt_scalar_hvx_stores(cpu_env,
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tcg_constant_tl(mask));
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}
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} else if (has_store_s0 && has_store_s1) {
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/*
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@ -178,5 +178,6 @@ FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1, 1, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_HVX_STORES, 2, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED, 3, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED, 4, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX, 5, 2)
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#endif
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